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| author |   Mikko Perttunen <mperttunen@nvidia.com> | 2014-06-18 17:23:24 +0300 |
|---|---|---|
| committer |   Peter De Schrijver <pdeschrijver@nvidia.com> | 2014-06-25 19:12:39 +0300 |
| commit | cb44cc2f48371e002eaead79e6fb77a4fc71e40f (patch) | |
| tree | 653cec6f224414bca0360298a92761ee17a6f899 /tools/perf/scripts/python | |
| parent | clk: tegra: Enable hardware control of SATA PLL (diff) | |
| download | wireguard-linux-cb44cc2f48371e002eaead79e6fb77a4fc71e40f.tar.xz wireguard-linux-cb44cc2f48371e002eaead79e6fb77a4fc71e40f.zip | |
clk: tegra: Add SATA clocks to Tegra124 initialization table
This adds two clocks, SATA and SATA_OOB, to the Tegra124 clock initialization
table. The clocks are needed for working SATA support.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions