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| author |   Neil Armstrong <neil.armstrong@linaro.org> | 2023-02-07 16:07:57 +0100 |
|---|---|---|
| committer | Neil Armstrong <neil.armstrong@linaro.org> | 2023-03-06 09:36:01 +0100 |
| commit | db217e84d0a3f4183ea5b6d5929e55b73128fcb2 (patch) | |
| tree | 4f0b55536d077fd5c7146d6c526e4be799d04db9 /tools/perf/scripts/python | |
| parent | arm64: dts: amlogic: meson-axg-jethome-jethub-j1xx: remove invalid #gpio-cells in onewire node (diff) | |
| download | wireguard-linux-db217e84d0a3f4183ea5b6d5929e55b73128fcb2.tar.xz wireguard-linux-db217e84d0a3f4183ea5b6d5929e55b73128fcb2.zip | |
arm64: dts: amlogic: meson-g12b-radxa-zero2: fix pwm clock names
Fixes the following bindings check error:
- pwm@2000: clock-names: 'oneOf' conditional failed, one must be fixed:
['clkin4'] is too short
'clkin4' is not one of ['clkin0', 'clkin1']
'clkin0' was expected
- pwm@7000: clock-names: 'oneOf' conditional failed, one must be fixed:
['clkin3'] is too short
'clkin3' is not one of ['clkin0', 'clkin1']
'clkin0' was expected
- pwm@19000: clock-names: 'oneOf' conditional failed, one must be fixed:
['clkin2'] is too short
'clkin2' is not one of ['clkin0', 'clkin1']
'clkin0' was expected
Fixes: d747e7f76a5f ("arm64: dts: meson: add support for Radxa Zero2")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230207-b4-amlogic-bindings-fixups-v2-v1-4-93b7e50286e7@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions