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| author |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-09-02 18:32:23 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2020-09-05 15:55:07 +0800 |
| commit | e3e61bce5f0851592a1ac62efdac78b5aaa4c09c (patch) | |
| tree | 5c9d9003f54bb976f37d11acee2d2a01b3bfc90b /tools/perf/scripts/python | |
| parent | arm64: dts: imx8qxp-colibri: Align pin configuration group names with schema (diff) | |
| download | wireguard-linux-e3e61bce5f0851592a1ac62efdac78b5aaa4c09c.tar.xz wireguard-linux-e3e61bce5f0851592a1ac62efdac78b5aaa4c09c.zip | |
arm64: dts: imx8mm-var-som: Add 32.768 kHz clock to PMIC
The ROHM BD71847 PMIC has a 32.768 kHz clock. Adding necessary parent
allows to probe the bd718x7 clock driver fixing boot errors:
bd718xx-clk bd71847-clk.1.auto: No parent clk found
bd718xx-clk: probe of bd71847-clk.1.auto failed with error -22
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions