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| author |   Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> | 2025-07-01 09:30:40 +0200 |
|---|---|---|
| committer |   Chun-Kuang Hu <chunkuang.hu@kernel.org> | 2025-08-14 14:07:06 +0000 |
| commit | f5b1819193667bf62c3c99d3921b9429997a14b2 (patch) | |
| tree | b8d6bc9003c1d32a46ae556974a14e9059eafb2a /tools/perf/scripts/python | |
| parent | drm/mediatek: Add error handling for old state CRTC in atomic_disable (diff) | |
| download | wireguard-linux-f5b1819193667bf62c3c99d3921b9429997a14b2.tar.xz wireguard-linux-f5b1819193667bf62c3c99d3921b9429997a14b2.zip | |
drm/mediatek: dsi: Fix DSI host and panel bridge pre-enable order
Since commit c9b1150a68d9 ("drm/atomic-helper: Re-order bridge chain
pre-enable and post-disable"), the bridge pre_enable callbacks are now
called before crtc enable, and the bridge post_disable callbacks after
the crtc disable.
In the mediatek-drm driver, this change leads to transfer errors on
mtk_dsi_host_transfer callback processing during the panel bridge
pre-enable sequence because the DSI host bridge pre_enable and CRTC
enable sequences, that are enabling the required clocks and PHY using
mtk_dsi_poweron function, are called after.
So, in order to fix this call order issue, request the DSI host bridge
be pre-enabled before panel bridge by setting pre_enable_prev_first
flag on DSI device bridge in the mtk_dsi_host_attach function.
Fixes: c9b1150a68d9 ("drm/atomic-helper: Re-order bridge chain pre-enable and post-disable")
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250701-mediatek-drm-fix-dsi-panel-init-v1-1-7af4adb9fdeb@collabora.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions