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| author |   Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 12:19:16 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 18:53:58 +0100 |
| commit | f890e67f292db46c9bd5b5c004ba0f98761d1a33 (patch) | |
| tree | a1ef7d2461c9d53e8ca0bb7385c730775bdd82f9 /tools/perf/scripts/python | |
| parent | dt-bindings: riscv: microchip: document the sev kit (diff) | |
| download | wireguard-linux-f890e67f292db46c9bd5b5c004ba0f98761d1a33.tar.xz wireguard-linux-f890e67f292db46c9bd5b5c004ba0f98761d1a33.zip | |
riscv: dts: microchip: add pci dma ranges for the icicle kit
The recently removed, accidentally included, "matr0" property was used
in place of a dma-ranges property. The PCI controller is non-functional
with mainline Linux in the v2022.02 or later reference designs and has
not worked without configuration of address-translation since v2021.08.
Add the address translation that will be used by the v2022.09 reference
design & update the compatible used by the dts. Since this change is not
backwards compatible, update the compatible to denote this, jumping over
v2022.09 directly to v2022.10.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions