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| author |   Sergey Matyukevich <sergey.matyukevich@syntacore.com> | 2022-08-30 18:53:06 +0300 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-09-08 13:34:58 -0700 |
| commit | 096b52fd2bb4996fd68d22b3b7ad21a1296db9d3 (patch) | |
| tree | d0628c73848c5c1f5d279baab349358985f4a0cc /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | perf: RISC-V: exclude invalid pmu counters from SBI calls (diff) | |
| download | wireguard-linux-096b52fd2bb4996fd68d22b3b7ad21a1296db9d3.tar.xz wireguard-linux-096b52fd2bb4996fd68d22b3b7ad21a1296db9d3.zip | |
perf: RISC-V: throttle perf events
Call perf_sample_event_took() to report time spent in overflow
interrupts. Perf core uses these measurements to throttle
perf events properly.
Signed-off-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20220830155306.301714-4-geomatsi@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions