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| author |   Wolfram Sang <wsa+renesas@sang-engineering.com> | 2022-07-13 12:14:45 +0200 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-08-15 11:09:08 +0200 |
| commit | 32fb5425547bae46c0d61ec01de1422ffe6d4758 (patch) | |
| tree | d07fb7e2571bd85220abc075a6402ffd4d3d8c1a /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | clk: renesas: r8a779f0: Add SDH0 clock (diff) | |
| download | wireguard-linux-32fb5425547bae46c0d61ec01de1422ffe6d4758.tar.xz wireguard-linux-32fb5425547bae46c0d61ec01de1422ffe6d4758.zip | |
clk: renesas: r8a779f0: Add CMT clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220713101447.3804-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions