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| author |   Catalin Marinas <catalin.marinas@arm.com> | 2022-09-30 09:18:26 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2022-09-30 09:18:26 +0100 |
| commit | 53630a1f6186e9df5fb75e9b55328e22b64de150 (patch) | |
| tree | cce45ad34594ae21ee6b2f7b37e6aadfc00715ec /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | Merge branch 'for-next/alternatives' into for-next/core (diff) | |
| parent | arm64/kprobe: Optimize the performance of patching single-step slot (diff) | |
| download | wireguard-linux-53630a1f6186e9df5fb75e9b55328e22b64de150.tar.xz wireguard-linux-53630a1f6186e9df5fb75e9b55328e22b64de150.zip | |
Merge branch 'for-next/misc' into for-next/core
* for-next/misc:
: Miscellaneous patches
arm64/kprobe: Optimize the performance of patching single-step slot
ARM64: reloc_test: add __init/__exit annotations to module init/exit funcs
arm64/mm: fold check for KFENCE into can_set_direct_map()
arm64: uaccess: simplify uaccess_mask_ptr()
arm64: mte: move register initialization to C
arm64: mm: handle ARM64_KERNEL_USES_PMD_MAPS in vmemmap_populate()
arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()
arm64: support huge vmalloc mappings
arm64: spectre: increase parameters that can be used to turn off bhb mitigation individually
arm64: run softirqs on the per-CPU IRQ stack
arm64: compat: Implement misalignment fixups for multiword loads
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions