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| author |   Florian Fainelli <f.fainelli@gmail.com> | 2015-02-10 17:33:07 -0800 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2015-02-16 12:48:28 -0800 |
| commit | 9df11828d9b5665ddef81e45f83dd5376a8cd620 (patch) | |
| tree | 7d47c740185086f20de1a9f0ceccbbac58933f2b /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | Linux 3.19-rc1 (diff) | |
| download | wireguard-linux-9df11828d9b5665ddef81e45f83dd5376a8cd620.tar.xz wireguard-linux-9df11828d9b5665ddef81e45f83dd5376a8cd620.zip | |
ARM: dts: BCM63xx: fix L2 cache properties
The L2 cache properties were completely off with respect to what the
hardware is configured for. Fix the cache-size, cache-line-size and
cache-sets to reflect the L2 cache controller we have: 512KB, 16 ways
and 32 bytes per cache-line.
Fixes: 46d4bca0445a0 ("ARM: BCM63XX: add BCM63138 minimal Device Tree")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions