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| author |   Dan Williams <dan.j.williams@intel.com> | 2023-10-31 10:59:00 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-10-31 10:59:00 -0700 |
| commit | 7f946e6d830fbdf411cd0641314edf11831efc88 (patch) | |
| tree | 4e3cfe2157e52e0d5aba6c548cd643f297a393c7 /tools/testing/cxl | |
| parent | tools/testing/cxl: Slow down the mock firmware transfer (diff) | |
| parent | cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devm (diff) | |
| download | wireguard-linux-7f946e6d830fbdf411cd0641314edf11831efc88.tar.xz wireguard-linux-7f946e6d830fbdf411cd0641314edf11831efc88.zip | |
Merge branch 'for-6.7/cxl-rch-eh' into cxl/next
Restricted CXL Host (RCH) Error Handling undoes the topology munging of
CXL 1.1 to enabled some AER recovery, and lands some base infrastructure
for handling Root-Complex-Event-Collectors (RCECs) with CXL. Include
this long running series finally for v6.7.
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/test/mem.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 75acc721c763..ee61fa3a2411 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -1457,10 +1457,8 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) cxlds = &mds->cxlds; cxlds->serial = pdev->id; - if (is_rcd(pdev)) { + if (is_rcd(pdev)) cxlds->rcd = true; - cxlds->component_reg_phys = CXL_RESOURCE_NONE; - } rc = cxl_enumerate_cmds(mds); if (rc) |