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| author | 2026-05-18 10:20:23 +0800 | |
|---|---|---|
| committer | 2026-05-21 11:58:16 +0200 | |
| commit | c36069c6f46c52458bb86fa8eb4803f1e0b70fb0 (patch) | |
| tree | 24775669f628d34ec2217854552cc9f57a36f3a9 /tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com | |
| parent | net: skbuff: propagate shared-frag marker through frag-transfer helpers (diff) | |
dt-bindings: ethernet: eswin: add optional TXD and RXD delay register offsets
Document two optional cells in eswin,hsp-sp-csr for the TXD and RXD
delay control register offsets.
These registers are used by the driver to clear any residual delay
configuration left by the bootloader, ensuring that MAC-side RGMII delay
settings are applied solely according to the kernel configuration.
Add a reference to the EIC7700X SoC Technical Reference Manual for
background information about the HSP CSR block.
Fixes: 888bd0eca93c ("dt-bindings: ethernet: eswin: Document for EIC7700 SoC")
Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260518022023.427-1-lizhi2@eswincomputing.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
