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| author |   Sergey Matyukevich <geomatsi@gmail.com> | 2026-01-25 21:09:57 -0700 |
|---|---|---|
| committer |   Paul Walmsley <pjw@kernel.org> | 2026-02-09 15:27:33 -0700 |
| commit | fd515e037efb3b6300eace247e14ab2bc7e38db5 (patch) | |
| tree | 15fddf6b2fef1a56c873e5dd925a8a58fbe0fc18 /tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com | |
| parent | riscv: vector: init vector context with proper vlenb (diff) | |
riscv: csr: define vtype register elements
Define masks and shifts for vtype CSR according to the vector specs:
- v0.7.1 used in early T-Head cores, known as xtheadvector in the kernel
- v1.0
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Andy Chiu <andybnac@gmail.com>
Tested-by: Andy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-4-geomatsi@gmail.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions