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| author |   Yash Shah <yash.shah@sifive.com> | 2019-10-25 08:30:03 +0000 |
|---|---|---|
| committer |   Paul Walmsley <paul.walmsley@sifive.com> | 2019-10-28 10:43:32 -0700 |
| commit | 00a5bf3a8ca30d19f24219fc3cfb74f4eab3600d (patch) | |
| tree | ca4482fe65348fc5321ed6093a9f5352fe70bb5b /tools/testing/selftests/seccomp | |
| parent | riscv: for C functions called only from assembly, mark with __visible (diff) | |
| download | wireguard-linux-00a5bf3a8ca30d19f24219fc3cfb74f4eab3600d.tar.xz wireguard-linux-00a5bf3a8ca30d19f24219fc3cfb74f4eab3600d.zip | |
RISC-V: Add PCIe I/O BAR memory mapping
For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux,
we need to establish a reserved memory region for them, so that drivers
that wish to use the legacy I/O BARs can issue reads and writes against
a memory region that is mapped to the host PCIe controller's I/O BAR
mapping.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'tools/testing/selftests/seccomp')
0 files changed, 0 insertions, 0 deletions