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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-17 13:20:54 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-17 13:20:54 -0800 |
| commit | a4eff16c54886c11972d6396ce8447b99e097343 (patch) | |
| tree | eae80ceb9c2827946f31e4bddc6f9c3a9da7b17a /tools/testing/selftests/timers | |
| parent | Merge branch 'akpm' (patches from Andrew) (diff) | |
| parent | parisc: Protect huge page pte changes with spinlocks (diff) | |
| download | wireguard-linux-a4eff16c54886c11972d6396ce8447b99e097343.tar.xz wireguard-linux-a4eff16c54886c11972d6396ce8447b99e097343.zip | |
Merge branch 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parsic updates from Helge Deller:
"This patchset includes two major fixes which are both scheduled for
stable:
First, __ARCH_SI_PREAMBLE_SIZE was defined with a wrong value.
Second, huge page pte and TLB changes needed protection with a
spinlock. Other than that there are just some trivial optimizations
and cleanups"
* 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Protect huge page pte changes with spinlocks
parisc: Imporove debug info about space registers and TLB configuration
parisc: Drop parisc-specific NSIGTRAP define
parisc: Fix __ARCH_SI_PREAMBLE_SIZE
parisc: Reduce overhead of parisc_requires_coherency()
parisc: Initialize PCI bridge cache line and default latency
Diffstat (limited to 'tools/testing/selftests/timers')
0 files changed, 0 insertions, 0 deletions