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author | 2025-08-31 09:20:17 -0700 | |
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committer | 2025-08-31 09:20:17 -0700 | |
commit | 5c3b3264e5858813632031ba58bcd6e1eeb3b214 (patch) | |
tree | d3eb237086337af655706a2171eec3fb4a611c71 /usr/include | |
parent | Merge tag 'sched_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (diff) | |
parent | x86/bugs: Add attack vector controls for SSB (diff) | |
download | wireguard-linux-5c3b3264e5858813632031ba58bcd6e1eeb3b214.tar.xz wireguard-linux-5c3b3264e5858813632031ba58bcd6e1eeb3b214.zip |
Merge tag 'x86_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Borislav Petkov:
- Convert the SSB mitigation to the attack vector controls which got
forgotten at the time
- Prevent the CPUID topology hierarchy detection on AMD from
overwriting the correct initial APIC ID
- Fix the case of a machine shipping without microcode in the BIOS, in
the AMD microcode loader
- Correct the Pentium 4 model range which has a constant TSC
* tag 'x86_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/bugs: Add attack vector controls for SSB
x86/cpu/topology: Use initial APIC ID from XTOPOLOGY leaf on AMD/HYGON
x86/microcode/AMD: Handle the case of no BIOS microcode
x86/cpu/intel: Fix the constant_tsc model check for Pentium 4
Diffstat (limited to 'usr/include')
0 files changed, 0 insertions, 0 deletions