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| author |   Andre Przywara <andre.przywara@arm.com> | 2015-12-01 14:33:41 +0000 |
|---|---|---|
| committer |   Christoffer Dall <christoffer.dall@linaro.org> | 2016-05-20 15:39:52 +0200 |
| commit | 96b298000db48360e49a1f8f9edc6d2b9c1b2548 (patch) | |
| tree | da31c7195b7cea7d92b5570eaf7ec39f55bb12af /virt/kvm/arm/vgic/vgic-mmio-v2.c | |
| parent | KVM: arm/arm64: vgic-new: Add ENABLE registers handlers (diff) | |
| download | wireguard-linux-96b298000db48360e49a1f8f9edc6d2b9c1b2548.tar.xz wireguard-linux-96b298000db48360e49a1f8f9edc6d2b9c1b2548.zip | |
KVM: arm/arm64: vgic-new: Add PENDING registers handlers
The pending register handlers are shared between the v2 and v3
emulation, so their implementation goes into vgic-mmio.c, to be easily
referenced from the v3 emulation as well later.
For level triggered interrupts the real line level is unaffected by
this write, so we keep this state separate and combine it with the
device's level to get the actual pending state.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic-mmio-v2.c')
| -rw-r--r-- | virt/kvm/arm/vgic/vgic-mmio-v2.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c index d5355b502f4a..c13a7089bc9a 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c @@ -78,10 +78,10 @@ static const struct vgic_register_region vgic_v2_dist_registers[] = { vgic_mmio_read_enable, vgic_mmio_write_cenable, 1, VGIC_ACCESS_32bit), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_SET, - vgic_mmio_read_raz, vgic_mmio_write_wi, 1, + vgic_mmio_read_pending, vgic_mmio_write_spending, 1, VGIC_ACCESS_32bit), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_CLEAR, - vgic_mmio_read_raz, vgic_mmio_write_wi, 1, + vgic_mmio_read_pending, vgic_mmio_write_cpending, 1, VGIC_ACCESS_32bit), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ACTIVE_SET, vgic_mmio_read_raz, vgic_mmio_write_wi, 1, |