diff options
Diffstat (limited to 'Documentation/devicetree/bindings/pci/qcom,pcie.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 300 |
1 files changed, 126 insertions, 174 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 0b69b12b849e..cf9a6910b542 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -8,62 +8,77 @@ title: Qualcomm PCI express root complex maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> - - Stanimir Varbanov <svarbanov@mm-sol.com> + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> description: | - Qualcomm PCIe root complex controller is bansed on the Synopsys DesignWare + Qualcomm PCIe root complex controller is based on the Synopsys DesignWare PCIe IP. properties: compatible: - enum: - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064-v2 - - qcom,pcie-apq8064 - - qcom,pcie-apq8084 - - qcom,pcie-msm8996 - - qcom,pcie-ipq4019 - - qcom,pcie-ipq8074 - - qcom,pcie-qcs404 - - qcom,pcie-sc7280 - - qcom,pcie-sc8180x - - qcom,pcie-sdm845 - - qcom,pcie-sm8150 - - qcom,pcie-sm8250 - - qcom,pcie-sm8450-pcie0 - - qcom,pcie-sm8450-pcie1 - - qcom,pcie-ipq6018 + oneOf: + - enum: + - qcom,pcie-apq8064 + - qcom,pcie-apq8084 + - qcom,pcie-ipq4019 + - qcom,pcie-ipq6018 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8064-v2 + - qcom,pcie-ipq8074 + - qcom,pcie-ipq8074-gen3 + - qcom,pcie-msm8996 + - qcom,pcie-qcs404 + - qcom,pcie-sdm845 + - qcom,pcie-sdx55 + - items: + - const: qcom,pcie-msm8998 + - const: qcom,pcie-msm8996 reg: minItems: 4 - maxItems: 5 + maxItems: 6 reg-names: minItems: 4 - maxItems: 5 + maxItems: 6 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 8 interrupt-names: - items: - - const: msi + minItems: 1 + maxItems: 8 + + iommu-map: + minItems: 1 + maxItems: 16 # Common definitions for clocks, clock-names and reset. # Platform constraints are described later. clocks: minItems: 3 - maxItems: 12 + maxItems: 13 clock-names: minItems: 3 - maxItems: 12 + maxItems: 13 + + dma-coherent: true + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: pcie-mem + - const: cpu-pcie resets: minItems: 1 maxItems: 12 - resets-names: + reset-names: minItems: 1 maxItems: 12 @@ -76,9 +91,6 @@ properties: vdda_refclk-supply: description: A phandle to the core analog power supply for IC which generates reference clock - vddpe-3v3-supply: - description: A phandle to the PCIe endpoint power supply - phys: maxItems: 1 @@ -93,6 +105,9 @@ properties: description: GPIO controlled connection to PERST# signal maxItems: 1 + required-opps: + maxItems: 1 + wake-gpios: description: GPIO controlled connection to WAKE# signal maxItems: 1 @@ -101,14 +116,19 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - - "#interrupt-cells" - interrupt-map-mask - interrupt-map - clocks - clock-names +anyOf: + - required: + - interrupts + - interrupt-names + - "#interrupt-cells" + - required: + - msi-map + allOf: - $ref: /schemas/pci/pci-bus.yaml# - if: @@ -140,6 +160,7 @@ allOf: contains: enum: - qcom,pcie-ipq6018 + - qcom,pcie-ipq8074-gen3 then: properties: reg: @@ -165,36 +186,36 @@ allOf: properties: reg: minItems: 4 - maxItems: 4 + maxItems: 5 reg-names: + minItems: 4 items: - const: parf # Qualcomm specific registers - const: dbi # DesignWare PCIe registers - const: elbi # External local bus interface registers - const: config # PCIe configuration space + - const: mhi # MHI registers - if: properties: compatible: contains: enum: - - qcom,pcie-sc7280 - - qcom,pcie-sc8180x - - qcom,pcie-sm8250 - - qcom,pcie-sm8450-pcie0 - - qcom,pcie-sm8450-pcie1 + - qcom,pcie-sdx55 then: properties: reg: minItems: 5 - maxItems: 5 + maxItems: 6 reg-names: + minItems: 5 items: - const: parf # Qualcomm specific registers - const: dbi # DesignWare PCIe registers - const: elbi # External local bus interface registers - const: atu # ATU address space - const: config # PCIe configuration space + - const: mhi # MHI registers - if: properties: @@ -298,27 +319,17 @@ allOf: enum: - qcom,pcie-msm8996 then: - oneOf: - - properties: - clock-names: - items: - - const: pipe # Pipe Clock driving internal logic - - const: aux # Auxiliary (AUX) clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - properties: - clock-names: - items: - - const: pipe # Pipe Clock driving internal logic - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: cfg # Configuration clock - - const: aux # Auxiliary (AUX) clock properties: clocks: minItems: 5 maxItems: 5 + clock-names: + items: + - const: pipe # Pipe Clock driving internal logic + - const: aux # Auxiliary (AUX) clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock resets: false reset-names: false @@ -359,6 +370,7 @@ allOf: contains: enum: - qcom,pcie-ipq6018 + - qcom,pcie-ipq8074-gen3 then: properties: clocks: @@ -419,36 +431,6 @@ allOf: compatible: contains: enum: - - qcom,pcie-sc7280 - then: - properties: - clocks: - minItems: 11 - maxItems: 11 - clock-names: - items: - - const: pipe # PIPE clock - - const: pipe_mux # PIPE MUX - - const: phy_pipe # PIPE output clock - - const: ref # REFERENCE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: tbu # PCIe TBU clock - - const: ddrss_sf_tbu # PCIe SF TBU clock - resets: - maxItems: 1 - reset-names: - items: - - const: pci # PCIe core reset - - - if: - properties: - compatible: - contains: - enum: - qcom,pcie-sdm845 then: oneOf: @@ -492,103 +474,21 @@ allOf: compatible: contains: enum: - - qcom,pcie-sc8180x - - qcom,pcie-sm8150 - - qcom,pcie-sm8250 - then: - oneOf: - # Unfortunately the "optional" ref clock is used in the middle of the list - - properties: - clocks: - minItems: 9 - maxItems: 9 - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: ref # REFERENCE clock - - const: tbu # PCIe TBU clock - - const: ddrss_sf_tbu # PCIe SF TBU clock - - properties: - clocks: - minItems: 8 - maxItems: 8 - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: tbu # PCIe TBU clock - - const: ddrss_sf_tbu # PCIe SF TBU clock - properties: - resets: - maxItems: 1 - reset-names: - items: - - const: pci # PCIe core reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-sm8450-pcie0 + - qcom,pcie-sdx55 then: properties: clocks: - minItems: 12 - maxItems: 12 - clock-names: - items: - - const: pipe # PIPE clock - - const: pipe_mux # PIPE MUX - - const: phy_pipe # PIPE output clock - - const: ref # REFERENCE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: ddrss_sf_tbu # PCIe SF TBU clock - - const: aggre0 # Aggre NoC PCIe0 AXI clock - - const: aggre1 # Aggre NoC PCIe1 AXI clock - resets: - maxItems: 1 - reset-names: - items: - - const: pci # PCIe core reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-sm8450-pcie1 - then: - properties: - clocks: - minItems: 11 - maxItems: 11 + minItems: 7 + maxItems: 7 clock-names: items: - const: pipe # PIPE clock - - const: pipe_mux # PIPE MUX - - const: phy_pipe # PIPE output clock - - const: ref # REFERENCE clock - const: aux # Auxiliary clock - const: cfg # Configuration clock - const: bus_master # Master AXI clock - const: bus_slave # Slave AXI clock - const: slave_q2a # Slave Q2A clock - - const: ddrss_sf_tbu # PCIe SF TBU clock - - const: aggre1 # Aggre NoC PCIe1 AXI clock + - const: sleep # PCIe Sleep clock resets: maxItems: 1 reset-names: @@ -606,6 +506,7 @@ allOf: - qcom,pcie-ipq8064 - qcom,pcie-ipq8064v2 - qcom,pcie-ipq8074 + - qcom,pcie-ipq8074-gen3 - qcom,pcie-qcs404 then: required: @@ -614,7 +515,7 @@ allOf: - if: not: properties: - compatibles: + compatible: contains: enum: - qcom,pcie-msm8996 @@ -623,6 +524,57 @@ allOf: - resets - reset-names + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-msm8996 + - qcom,pcie-sdm845 + then: + oneOf: + - properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: msi + - properties: + interrupts: + minItems: 8 + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-apq8064 + - qcom,pcie-apq8084 + - qcom,pcie-ipq4019 + - qcom,pcie-ipq6018 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8064-v2 + - qcom,pcie-ipq8074 + - qcom,pcie-ipq8074-gen3 + - qcom,pcie-qcs404 + then: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: msi + unevaluatedProperties: false examples: |