diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 82387b9cb800..7507548cdb16 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -46,6 +46,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <20000>; enable-active-high; }; @@ -163,22 +164,22 @@ ddrc_opp_table: opp-table { compatible = "operating-points-v2"; - opp-25M { + opp-25000000 { opp-hz = /bits/ 64 <25000000>; }; - opp-100M { + opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; /* * On imx8mq B0 PLL can't be bypassed so low bus is 166M */ - opp-166M { + opp-166000000 { opp-hz = /bits/ 64 <166935483>; }; - opp-800M { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; }; }; @@ -355,10 +356,9 @@ pinctrl-0 = <&pinctrl_pcie0>; reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>; clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>, - <&clk IMX8MQ_CLK_PCIE1_AUX>, + <&pcie0_refclk>, <&clk IMX8MQ_CLK_PCIE1_PHY>, - <&pcie0_refclk>; - clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + <&clk IMX8MQ_CLK_PCIE1_AUX>; vph-supply = <&vgen5_reg>; status = "okay"; }; @@ -368,10 +368,9 @@ pinctrl-0 = <&pinctrl_pcie1>; reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>; clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, - <&clk IMX8MQ_CLK_PCIE2_AUX>, + <&pcie0_refclk>, <&clk IMX8MQ_CLK_PCIE2_PHY>, - <&pcie0_refclk>; - clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + <&clk IMX8MQ_CLK_PCIE2_AUX>; vpcie-supply = <®_pcie1>; vph-supply = <&vgen5_reg>; status = "okay"; |