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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi16
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
index 4e05120c62d4..0c960efd9b3d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
@@ -15,7 +15,7 @@
stdout-path = &uart1;
};
- mdio0: bitbang-mdio {
+ mdio0: mdio {
compatible = "virtual,mdio-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio_bitbang>, <&pinctrl_fec1_phy_reset>;
@@ -177,7 +177,7 @@
port@2 {
reg = <2>;
- label = "cpu";
+ phy-mode = "rev-rmii";
ethernet = <&fec1>;
fixed-link {
@@ -490,7 +490,7 @@
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
- rave-sp {
+ mcu {
compatible = "zii,rave-sp-rdu2";
current-speed = <1000000>;
#address-cells = <1>;
@@ -551,10 +551,9 @@
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
- <&clk IMX8MQ_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>,
<&clk IMX8MQ_CLK_PCIE1_PHY>,
- <&pcie0_refclk>;
- clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ <&clk IMX8MQ_CLK_PCIE1_AUX>;
vph-supply = <&vgen5_reg>;
status = "okay";
};
@@ -564,10 +563,9 @@
pinctrl-0 = <&pinctrl_pcie1>;
reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
- <&clk IMX8MQ_CLK_PCIE2_AUX>,
+ <&pcie1_refclk>,
<&clk IMX8MQ_CLK_PCIE2_PHY>,
- <&pcie1_refclk>;
- clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
vph-supply = <&vgen5_reg>;
status = "okay";
};