diff options
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 134 |
1 files changed, 67 insertions, 67 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi index e7d22619a4c0..3e27624c31de 100644 --- a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi @@ -17,13 +17,13 @@ &bl_pwm_pmx_func >; - boot_sel_pmx_func: boot_sel_pmx_func { + boot_sel_pmx_func: boot-sel-pins { pinctrl-single,pins = < 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */ >; }; - emmc_pmx_func: emmc_pmx_func { + emmc_pmx_func: emmc-pins { pinctrl-single,pins = < 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */ 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */ @@ -38,7 +38,7 @@ >; }; - sd_pmx_func: sd_pmx_func { + sd_pmx_func: sd-pins { pinctrl-single,pins = < 0xc MUX_M0 /* SD_CLK (IOMG003) */ 0x10 MUX_M0 /* SD_CMD (IOMG004) */ @@ -48,7 +48,7 @@ 0x20 MUX_M0 /* SD_DATA3 (IOMG008) */ >; }; - sd_pmx_idle: sd_pmx_idle { + sd_pmx_idle: sd-idle-pins { pinctrl-single,pins = < 0xc MUX_M1 /* SD_CLK (IOMG003) */ 0x10 MUX_M1 /* SD_CMD (IOMG004) */ @@ -59,7 +59,7 @@ >; }; - sdio_pmx_func: sdio_pmx_func { + sdio_pmx_func: sdio-pins { pinctrl-single,pins = < 0x128 MUX_M0 /* SDIO_CLK (IOMG074) */ 0x12c MUX_M0 /* SDIO_CMD (IOMG075) */ @@ -69,7 +69,7 @@ 0x13c MUX_M0 /* SDIO_DATA3 (IOMG079) */ >; }; - sdio_pmx_idle: sdio_pmx_idle { + sdio_pmx_idle: sdio-idle-pins { pinctrl-single,pins = < 0x128 MUX_M1 /* SDIO_CLK (IOMG074) */ 0x12c MUX_M1 /* SDIO_CMD (IOMG075) */ @@ -80,7 +80,7 @@ >; }; - isp_pmx_func: isp_pmx_func { + isp_pmx_func: isp-pins { pinctrl-single,pins = < 0x24 MUX_M0 /* ISP_PWDN0 (IOMG009) */ 0x28 MUX_M0 /* ISP_PWDN1 (IOMG010) */ @@ -101,19 +101,19 @@ >; }; - hkadc_ssi_pmx_func: hkadc_ssi_pmx_func { + hkadc_ssi_pmx_func: hkadc-ssi-pins { pinctrl-single,pins = < 0x68 MUX_M0 /* HKADC_SSI (IOMG026) */ >; }; - codec_clk_pmx_func: codec_clk_pmx_func { + codec_clk_pmx_func: codec-clk-pins { pinctrl-single,pins = < 0x6c MUX_M0 /* CODEC_CLK (IOMG027) */ >; }; - codec_pmx_func: codec_pmx_func { + codec_pmx_func: codec-pins { pinctrl-single,pins = < 0x70 MUX_M1 /* DMIC_CLK (IOMG028) */ 0x74 MUX_M0 /* CODEC_SYNC (IOMG029) */ @@ -122,7 +122,7 @@ >; }; - fm_pmx_func: fm_pmx_func { + fm_pmx_func: fm-pins { pinctrl-single,pins = < 0x80 MUX_M1 /* FM_XCLK (IOMG032) */ 0x84 MUX_M1 /* FM_XFS (IOMG033) */ @@ -131,7 +131,7 @@ >; }; - bt_pmx_func: bt_pmx_func { + bt_pmx_func: bt-pins { pinctrl-single,pins = < 0x90 MUX_M0 /* BT_XCLK (IOMG036) */ 0x94 MUX_M0 /* BT_XFS (IOMG037) */ @@ -140,26 +140,26 @@ >; }; - pwm_in_pmx_func: pwm_in_pmx_func { + pwm_in_pmx_func: pwm-in-pins { pinctrl-single,pins = < 0xb8 MUX_M1 /* PWM_IN (IOMG046) */ >; }; - bl_pwm_pmx_func: bl_pwm_pmx_func { + bl_pwm_pmx_func: bl-pwm-pins { pinctrl-single,pins = < 0xbc MUX_M1 /* BL_PWM (IOMG047) */ >; }; - uart0_pmx_func: uart0_pmx_func { + uart0_pmx_func: uart0-pins { pinctrl-single,pins = < 0xc0 MUX_M0 /* UART0_RXD (IOMG048) */ 0xc4 MUX_M0 /* UART0_TXD (IOMG049) */ >; }; - uart1_pmx_func: uart1_pmx_func { + uart1_pmx_func: uart1-pins { pinctrl-single,pins = < 0xc8 MUX_M0 /* UART1_CTS_N (IOMG050) */ 0xcc MUX_M0 /* UART1_RTS_N (IOMG051) */ @@ -168,7 +168,7 @@ >; }; - uart2_pmx_func: uart2_pmx_func { + uart2_pmx_func: uart2-pins { pinctrl-single,pins = < 0xd8 MUX_M0 /* UART2_CTS_N (IOMG054) */ 0xdc MUX_M0 /* UART2_RTS_N (IOMG055) */ @@ -177,7 +177,7 @@ >; }; - uart3_pmx_func: uart3_pmx_func { + uart3_pmx_func: uart3-pins { pinctrl-single,pins = < 0x180 MUX_M1 /* UART3_CTS_N (IOMG096) */ 0x184 MUX_M1 /* UART3_RTS_N (IOMG097) */ @@ -186,7 +186,7 @@ >; }; - uart4_pmx_func: uart4_pmx_func { + uart4_pmx_func: uart4-pins { pinctrl-single,pins = < 0x1d0 MUX_M1 /* UART4_CTS_N (IOMG116) */ 0x1d4 MUX_M1 /* UART4_RTS_N (IOMG117) */ @@ -195,35 +195,35 @@ >; }; - uart5_pmx_func: uart5_pmx_func { + uart5_pmx_func: uart5-pins { pinctrl-single,pins = < 0x1c8 MUX_M1 /* UART5_RXD (IOMG114) */ 0x1cc MUX_M1 /* UART5_TXD (IOMG115) */ >; }; - i2c0_pmx_func: i2c0_pmx_func { + i2c0_pmx_func: i2c0-pins { pinctrl-single,pins = < 0xe8 MUX_M0 /* I2C0_SCL (IOMG058) */ 0xec MUX_M0 /* I2C0_SDA (IOMG059) */ >; }; - i2c1_pmx_func: i2c1_pmx_func { + i2c1_pmx_func: i2c1-pins { pinctrl-single,pins = < 0xf0 MUX_M0 /* I2C1_SCL (IOMG060) */ 0xf4 MUX_M0 /* I2C1_SDA (IOMG061) */ >; }; - i2c2_pmx_func: i2c2_pmx_func { + i2c2_pmx_func: i2c2-pins { pinctrl-single,pins = < 0xf8 MUX_M0 /* I2C2_SCL (IOMG062) */ 0xfc MUX_M0 /* I2C2_SDA (IOMG063) */ >; }; - spi0_pmx_func: spi0_pmx_func { + spi0_pmx_func: spi0-pins { pinctrl-single,pins = < 0x1a0 MUX_M1 /* SPI0_DI (IOMG104) */ 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */ @@ -244,7 +244,7 @@ &bl_pwm_cfg_func >; - boot_sel_cfg_func: boot_sel_cfg_func { + boot_sel_cfg_func: boot-sel-cfg-pins { pinctrl-single,pins = < 0x0 0x0 /* BOOT_SEL (IOCFG000) */ >; @@ -253,7 +253,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - hkadc_ssi_cfg_func: hkadc_ssi_cfg_func { + hkadc_ssi_cfg_func: hkadc-ssi-cfg-pins { pinctrl-single,pins = < 0x6c 0x0 /* HKADC_SSI (IOCFG027) */ >; @@ -262,7 +262,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - emmc_clk_cfg_func: emmc_clk_cfg_func { + emmc_clk_cfg_func: emmc-clk-cfg-pins { pinctrl-single,pins = < 0x104 0x0 /* EMMC_CLK (IOCFG065) */ >; @@ -271,7 +271,7 @@ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>; }; - emmc_cfg_func: emmc_cfg_func { + emmc_cfg_func: emmc-cfg-pins { pinctrl-single,pins = < 0x108 0x0 /* EMMC_CMD (IOCFG066) */ 0x10c 0x0 /* EMMC_DATA0 (IOCFG067) */ @@ -288,7 +288,7 @@ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - emmc_rst_cfg_func: emmc_rst_cfg_func { + emmc_rst_cfg_func: emmc-rst-cfg-pins { pinctrl-single,pins = < 0x12c 0x0 /* EMMC_RST_N (IOCFG075) */ >; @@ -297,7 +297,7 @@ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - sd_clk_cfg_func: sd_clk_cfg_func { + sd_clk_cfg_func: sd-clk-cfg-pins { pinctrl-single,pins = < 0xc 0x0 /* SD_CLK (IOCFG003) */ >; @@ -305,7 +305,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_10MA DRIVE_MASK>; }; - sd_clk_cfg_idle: sd_clk_cfg_idle { + sd_clk_cfg_idle: sd-clk-cfg-idle-pins { pinctrl-single,pins = < 0xc 0x0 /* SD_CLK (IOCFG003) */ >; @@ -314,7 +314,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - sd_cfg_func: sd_cfg_func { + sd_cfg_func: sd-cfg-pins { pinctrl-single,pins = < 0x10 0x0 /* SD_CMD (IOCFG004) */ 0x14 0x0 /* SD_DATA0 (IOCFG005) */ @@ -326,7 +326,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>; }; - sd_cfg_idle: sd_cfg_idle { + sd_cfg_idle: sd-cfg-idle-pins { pinctrl-single,pins = < 0x10 0x0 /* SD_CMD (IOCFG004) */ 0x14 0x0 /* SD_DATA0 (IOCFG005) */ @@ -339,7 +339,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - sdio_clk_cfg_func: sdio_clk_cfg_func { + sdio_clk_cfg_func: sdio-clk-cfg-pins { pinctrl-single,pins = < 0x134 0x0 /* SDIO_CLK (IOCFG077) */ >; @@ -347,7 +347,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>; }; - sdio_clk_cfg_idle: sdio_clk_cfg_idle { + sdio_clk_cfg_idle: sdio-clk-cfg-idle-pins { pinctrl-single,pins = < 0x134 0x0 /* SDIO_CLK (IOCFG077) */ >; @@ -356,7 +356,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - sdio_cfg_func: sdio_cfg_func { + sdio_cfg_func: sdio-cfg-pins { pinctrl-single,pins = < 0x138 0x0 /* SDIO_CMD (IOCFG078) */ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */ @@ -368,7 +368,7 @@ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - sdio_cfg_idle: sdio_cfg_idle { + sdio_cfg_idle: sdio-cfg-idle-pins { pinctrl-single,pins = < 0x138 0x0 /* SDIO_CMD (IOCFG078) */ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */ @@ -381,7 +381,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - isp_cfg_func1: isp_cfg_func1 { + isp_cfg_func1: isp-cfg-func1-pins { pinctrl-single,pins = < 0x28 0x0 /* ISP_PWDN0 (IOCFG010) */ 0x2c 0x0 /* ISP_PWDN1 (IOCFG011) */ @@ -403,7 +403,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - isp_cfg_idle1: isp_cfg_idle1 { + isp_cfg_idle1: isp-cfg-idle1-pins { pinctrl-single,pins = < 0x34 0x0 /* ISP_SHUTTER0 (IOCFG013) */ 0x38 0x0 /* ISP_SHUTTER1 (IOCFG014) */ @@ -413,7 +413,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - isp_cfg_func2: isp_cfg_func2 { + isp_cfg_func2: isp-cfg-func2-pins { pinctrl-single,pins = < 0x54 0x0 /* ISP_STROBE1 (IOCFG021) */ >; @@ -422,7 +422,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - codec_clk_cfg_func: codec_clk_cfg_func { + codec_clk_cfg_func: codec-clk-cfg-pins { pinctrl-single,pins = < 0x70 0x0 /* CODEC_CLK (IOCFG028) */ >; @@ -430,7 +430,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - codec_clk_cfg_idle: codec_clk_cfg_idle { + codec_clk_cfg_idle: codec-clk-cfg-idle-pins { pinctrl-single,pins = < 0x70 0x0 /* CODEC_CLK (IOCFG028) */ >; @@ -439,7 +439,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - codec_cfg_func1: codec_cfg_func1 { + codec_cfg_func1: codec-cfg-func1-pins { pinctrl-single,pins = < 0x74 0x0 /* DMIC_CLK (IOCFG029) */ >; @@ -448,7 +448,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - codec_cfg_func2: codec_cfg_func2 { + codec_cfg_func2: codec-cfg-func2-pins { pinctrl-single,pins = < 0x78 0x0 /* CODEC_SYNC (IOCFG030) */ 0x7c 0x0 /* CODEC_DI (IOCFG031) */ @@ -458,7 +458,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - codec_cfg_idle2: codec_cfg_idle2 { + codec_cfg_idle2: codec-cfg-idle2-pins { pinctrl-single,pins = < 0x78 0x0 /* CODEC_SYNC (IOCFG030) */ 0x7c 0x0 /* CODEC_DI (IOCFG031) */ @@ -469,7 +469,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - fm_cfg_func: fm_cfg_func { + fm_cfg_func: fm-cfg-pins { pinctrl-single,pins = < 0x84 0x0 /* FM_XCLK (IOCFG033) */ 0x88 0x0 /* FM_XFS (IOCFG034) */ @@ -481,7 +481,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - bt_cfg_func: bt_cfg_func { + bt_cfg_func: bt-cfg-pins { pinctrl-single,pins = < 0x94 0x0 /* BT_XCLK (IOCFG037) */ 0x98 0x0 /* BT_XFS (IOCFG038) */ @@ -492,7 +492,7 @@ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>; pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - bt_cfg_idle: bt_cfg_idle { + bt_cfg_idle: bt-cfg-idle-pins { pinctrl-single,pins = < 0x94 0x0 /* BT_XCLK (IOCFG037) */ 0x98 0x0 /* BT_XFS (IOCFG038) */ @@ -504,7 +504,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - pwm_in_cfg_func: pwm_in_cfg_func { + pwm_in_cfg_func: pwm-in-cfg-pins { pinctrl-single,pins = < 0xbc 0x0 /* PWM_IN (IOCFG047) */ >; @@ -513,7 +513,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - bl_pwm_cfg_func: bl_pwm_cfg_func { + bl_pwm_cfg_func: bl-pwm-cfg-pins { pinctrl-single,pins = < 0xc0 0x0 /* BL_PWM (IOCFG048) */ >; @@ -522,7 +522,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart0_cfg_func1: uart0_cfg_func1 { + uart0_cfg_func1: uart0-cfg-func1-pins { pinctrl-single,pins = < 0xc4 0x0 /* UART0_RXD (IOCFG049) */ >; @@ -531,7 +531,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart0_cfg_func2: uart0_cfg_func2 { + uart0_cfg_func2: uart0-cfg-func2-pins { pinctrl-single,pins = < 0xc8 0x0 /* UART0_TXD (IOCFG050) */ >; @@ -540,7 +540,7 @@ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>; }; - uart1_cfg_func1: uart1_cfg_func1 { + uart1_cfg_func1: uart1-cfg-func1-pins { pinctrl-single,pins = < 0xcc 0x0 /* UART1_CTS_N (IOCFG051) */ 0xd4 0x0 /* UART1_RXD (IOCFG053) */ @@ -550,7 +550,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart1_cfg_func2: uart1_cfg_func2 { + uart1_cfg_func2: uart1-cfg-func2-pins { pinctrl-single,pins = < 0xd0 0x0 /* UART1_RTS_N (IOCFG052) */ 0xd8 0x0 /* UART1_TXD (IOCFG054) */ @@ -560,7 +560,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart2_cfg_func: uart2_cfg_func { + uart2_cfg_func: uart2-cfg-pins { pinctrl-single,pins = < 0xdc 0x0 /* UART2_CTS_N (IOCFG055) */ 0xe0 0x0 /* UART2_RTS_N (IOCFG056) */ @@ -572,7 +572,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart3_cfg_func: uart3_cfg_func { + uart3_cfg_func: uart3-cfg-pins { pinctrl-single,pins = < 0x190 0x0 /* UART3_CTS_N (IOCFG100) */ 0x194 0x0 /* UART3_RTS_N (IOCFG101) */ @@ -584,7 +584,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart4_cfg_func: uart4_cfg_func { + uart4_cfg_func: uart4-cfg-pins { pinctrl-single,pins = < 0x1e0 0x0 /* UART4_CTS_N (IOCFG120) */ 0x1e4 0x0 /* UART4_RTS_N (IOCFG121) */ @@ -596,7 +596,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - uart5_cfg_func: uart5_cfg_func { + uart5_cfg_func: uart5-cfg-pins { pinctrl-single,pins = < 0x1d8 0x0 /* UART4_RXD (IOCFG118) */ 0x1dc 0x0 /* UART4_TXD (IOCFG119) */ @@ -606,7 +606,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - i2c0_cfg_func: i2c0_cfg_func { + i2c0_cfg_func: i2c0-cfg-pins { pinctrl-single,pins = < 0xec 0x0 /* I2C0_SCL (IOCFG059) */ 0xf0 0x0 /* I2C0_SDA (IOCFG060) */ @@ -616,7 +616,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - i2c1_cfg_func: i2c1_cfg_func { + i2c1_cfg_func: i2c1-cfg-pins { pinctrl-single,pins = < 0xf4 0x0 /* I2C1_SCL (IOCFG061) */ 0xf8 0x0 /* I2C1_SDA (IOCFG062) */ @@ -626,7 +626,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - i2c2_cfg_func: i2c2_cfg_func { + i2c2_cfg_func: i2c2-cfg-pins { pinctrl-single,pins = < 0xfc 0x0 /* I2C2_SCL (IOCFG063) */ 0x100 0x0 /* I2C2_SDA (IOCFG064) */ @@ -636,7 +636,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - spi0_cfg_func: spi0_cfg_func { + spi0_cfg_func: spi0-cfg-pins { pinctrl-single,pins = < 0x1b0 0x0 /* SPI0_DI (IOCFG108) */ 0x1b4 0x0 /* SPI0_DO (IOCFG109) */ @@ -656,7 +656,7 @@ &rstout_n_cfg_func >; - rstout_n_cfg_func: rstout_n_cfg_func { + rstout_n_cfg_func: rstout-n-cfg-pins { pinctrl-single,pins = < 0x0 0x0 /* RSTOUT_N (IOCFG000) */ >; @@ -665,7 +665,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - pmu_peri_en_cfg_func: pmu_peri_en_cfg_func { + pmu_peri_en_cfg_func: pmu-peri-en-cfg-pins { pinctrl-single,pins = < 0x4 0x0 /* PMU_PERI_EN (IOCFG001) */ >; @@ -674,7 +674,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - sysclk0_en_cfg_func: sysclk0_en_cfg_func { + sysclk0_en_cfg_func: sysclk0-en-cfg-pins { pinctrl-single,pins = < 0x8 0x0 /* SYSCLK0_EN (IOCFG002) */ >; @@ -683,7 +683,7 @@ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>; }; - jtag_tdo_cfg_func: jtag_tdo_cfg_func { + jtag_tdo_cfg_func: jtag-tdo-cfg-pins { pinctrl-single,pins = < 0xc 0x0 /* JTAG_TDO (IOCFG003) */ >; @@ -692,7 +692,7 @@ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>; }; - rf_reset_cfg_func: rf_reset_cfg_func { + rf_reset_cfg_func: rf-reset-cfg-pins { pinctrl-single,pins = < 0x70 0x0 /* RF_RESET0 (IOCFG028) */ 0x74 0x0 /* RF_RESET1 (IOCFG029) */ |