diff options
Diffstat (limited to 'arch/arm64/boot/dts/tesla/fsd.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/tesla/fsd.dtsi | 183 |
1 files changed, 165 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..047a83cee603 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -281,6 +281,8 @@ cpucl_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x400000>; cache-line-size = <64>; cache-sets = <4096>; @@ -340,6 +342,18 @@ #clock-cells = <0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mfc_left: region@84000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0 0x84000000 0 0x8000000>; + }; + }; + soc: soc@0 { compatible = "simple-bus"; #address-cells = <2>; @@ -351,8 +365,8 @@ compatible = "arm,gic-v3"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */ - <0x0 0x10600000 0x0 0x200000>; /* GICR_RD+GICR_SGI */ + reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */ + <0x0 0x10600000 0x0 0x200000>; /* GICR_RD+GICR_SGI */ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; @@ -466,6 +480,11 @@ clock-names = "fin_pll"; }; + sysreg_cam: system-controller@12630000 { + compatible = "tesla,fsd-cam-sysreg", "syscon"; + reg = <0x0 0x12630000 0x0 0x500>; + }; + clock_mfc: clock-controller@12810000 { compatible = "tesla,fsd-clock-mfc"; reg = <0x0 0x12810000 0x0 0x3000>; @@ -492,6 +511,11 @@ "dout_cmu_peric_shared1div4_dmaclk"; }; + sysreg_peric: system-controller@14030000 { + compatible = "tesla,fsd-peric-sysreg", "syscon"; + reg = <0x0 0x14030000 0x0 0x1000>; + }; + clock_fsys0: clock-controller@15010000 { compatible = "tesla,fsd-clock-fsys0"; reg = <0x0 0x15010000 0x0 0x3000>; @@ -506,6 +530,11 @@ "dout_cmu_fsys0_shared0div4"; }; + sysreg_fsys0: system-controller@15030000 { + compatible = "tesla,fsd-fsys0-sysreg", "syscon"; + reg = <0x0 0x15030000 0x0 0x1000>; + }; + clock_fsys1: clock-controller@16810000 { compatible = "tesla,fsd-clock-fsys1"; reg = <0x0 0x16810000 0x0 0x3000>; @@ -518,6 +547,11 @@ "dout_cmu_fsys1_shared0div4"; }; + sysreg_fsys1: system-controller@16830000 { + compatible = "tesla,fsd-fsys1-sysreg", "syscon"; + reg = <0x0 0x16830000 0x0 0x1000>; + }; + mdma0: dma-controller@10100000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0x10100000 0x0 0x1000>; @@ -559,7 +593,7 @@ }; serial_0: serial@14180000 { - compatible = "samsung,exynos4210-uart"; + compatible = "tesla,fsd-uart", "samsung,exynos4210-uart"; reg = <0x0 0x14180000 0x0 0x100>; interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 1>, <&pdma1 0>; @@ -567,11 +601,12 @@ clocks = <&clock_peric PERIC_PCLK_UART0>, <&clock_peric PERIC_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; status = "disabled"; }; serial_1: serial@14190000 { - compatible = "samsung,exynos4210-uart"; + compatible = "tesla,fsd-uart", "samsung,exynos4210-uart"; reg = <0x0 0x14190000 0x0 0x100>; interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 3>, <&pdma1 2>; @@ -579,16 +614,17 @@ clocks = <&clock_peric PERIC_PCLK_UART1>, <&clock_peric PERIC_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; status = "disabled"; }; pmu_system_controller: system-controller@11400000 { - compatible = "samsung,exynos7-pmu", "syscon"; + compatible = "tesla,fsd-pmu", "samsung,exynos7-pmu", "syscon"; reg = <0x0 0x11400000 0x0 0x5000>; }; watchdog_0: watchdog@100a0000 { - compatible = "samsung,exynos7-wdt"; + compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100a0000 0x0 0x100>; interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; samsung,syscon-phandle = <&pmu_system_controller>; @@ -597,7 +633,7 @@ }; watchdog_1: watchdog@100b0000 { - compatible = "samsung,exynos7-wdt"; + compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100b0000 0x0 0x100>; interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>; samsung,syscon-phandle = <&pmu_system_controller>; @@ -606,7 +642,7 @@ }; watchdog_2: watchdog@100c0000 { - compatible = "samsung,exynos7-wdt"; + compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100c0000 0x0 0x100>; interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; samsung,syscon-phandle = <&pmu_system_controller>; @@ -615,7 +651,7 @@ }; pwm_0: pwm@14100000 { - compatible = "samsung,exynos4210-pwm"; + compatible = "tesla,fsd-pwm", "samsung,exynos4210-pwm"; reg = <0x0 0x14100000 0x0 0x100>; samsung,pwm-outputs = <0>, <1>, <2>, <3>; #pwm-cells = <3>; @@ -625,7 +661,7 @@ }; pwm_1: pwm@14110000 { - compatible = "samsung,exynos4210-pwm"; + compatible = "tesla,fsd-pwm", "samsung,exynos4210-pwm"; reg = <0x0 0x14110000 0x0 0x100>; samsung,pwm-outputs = <0>, <1>, <2>, <3>; #pwm-cells = <3>; @@ -635,7 +671,7 @@ }; hsi2c_0: i2c@14200000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14200000 0x0 0x1000>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -648,7 +684,7 @@ }; hsi2c_1: i2c@14210000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14210000 0x0 0x1000>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -661,7 +697,7 @@ }; hsi2c_2: i2c@14220000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14220000 0x0 0x1000>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -674,7 +710,7 @@ }; hsi2c_3: i2c@14230000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14230000 0x0 0x1000>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -687,7 +723,7 @@ }; hsi2c_4: i2c@14240000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14240000 0x0 0x1000>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -700,7 +736,7 @@ }; hsi2c_5: i2c@14250000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14250000 0x0 0x1000>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -713,7 +749,7 @@ }; hsi2c_6: i2c@14260000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14260000 0x0 0x1000>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -726,7 +762,7 @@ }; hsi2c_7: i2c@14270000 { - compatible = "samsung,exynos7-hsi2c"; + compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c"; reg = <0x0 0x14270000 0x0 0x1000>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -738,6 +774,40 @@ status = "disabled"; }; + i2s_0: i2s@140e0000 { + compatible = "tesla,fsd-i2s"; + reg = <0x0 0x140e0000 0x0 0x100>; + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 14>, <&pdma1 13>, <&pdma1 12>; + dma-names = "tx", "rx", "tx-sec"; + #clock-cells = <1>; + clocks = <&clock_peric PERIC_PCLK_TDM0>, + <&clock_peric PERIC_HCLK_TDM0>, + <&clock_peric PERIC_HCLK_TDM0>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + + i2s_1: i2s@140f0000 { + compatible = "tesla,fsd-i2s"; + reg = <0x0 0x140f0000 0x0 0x100>; + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 17>, <&pdma1 16>, <&pdma1 15>; + dma-names = "tx", "rx", "tx-sec"; + #clock-cells = <1>; + clocks = <&clock_peric PERIC_PCLK_TDM1>, + <&clock_peric PERIC_HCLK_TDM1>, + <&clock_peric PERIC_HCLK_TDM1>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + pinctrl_pmu: pinctrl@114f0000 { compatible = "tesla,fsd-pinctrl"; reg = <0x0 0x114f0000 0x0 0x1000>; @@ -755,6 +825,74 @@ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; }; + m_can0: can@14088000 { + compatible = "bosch,m_can"; + reg = <0x0 0x14088000 0x0 0x0200>, + <0x0 0x14080000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can0_bus>; + clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can1: can@14098000 { + compatible = "bosch,m_can"; + reg = <0x0 0x14098000 0x0 0x0200>, + <0x0 0x14090000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can1_bus>; + clocks = <&clock_peric PERIC_MCAN1_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can2: can@140a8000 { + compatible = "bosch,m_can"; + reg = <0x0 0x140a8000 0x0 0x0200>, + <0x0 0x140a0000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can2_bus>; + clocks = <&clock_peric PERIC_MCAN2_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can3: can@140b8000 { + compatible = "bosch,m_can"; + reg = <0x0 0x140b8000 0x0 0x0200>, + <0x0 0x140b0000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can3_bus>; + clocks = <&clock_peric PERIC_MCAN3_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + spi_0: spi@14140000 { compatible = "tesla,fsd-spi"; reg = <0x0 0x14140000 0x0 0x100>; @@ -832,6 +970,15 @@ clock-names = "fin_pll", "mct"; }; + mfc: mfc@12880000 { + compatible = "tesla,fsd-mfc"; + reg = <0x0 0x12880000 0x0 0x10000>; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "mfc"; + clocks = <&clock_mfc MFC_MFC_IPCLKPORT_ACLK>; + memory-region = <&mfc_left>; + }; + ufs: ufs@15120000 { compatible = "tesla,fsd-ufs"; reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */ |