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-rw-r--r--arch/mips/alchemy/common/dma.c23
-rw-r--r--arch/mips/alchemy/common/gpiolib.c6
-rw-r--r--arch/mips/alchemy/common/platform.c8
-rw-r--r--arch/mips/alchemy/devboards/db1000.c80
4 files changed, 50 insertions, 67 deletions
diff --git a/arch/mips/alchemy/common/dma.c b/arch/mips/alchemy/common/dma.c
index 973049b5bd61..44d8433b1f45 100644
--- a/arch/mips/alchemy/common/dma.c
+++ b/arch/mips/alchemy/common/dma.c
@@ -131,29 +131,6 @@ static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = {
{ AU1100_SD1_PHYS_ADDR + 0x04, DMA_DS | DMA_DW8 | DMA_DR } /* coherent */
};
-void dump_au1000_dma_channel(unsigned int dmanr)
-{
- struct dma_chan *chan;
-
- if (dmanr >= NUM_AU1000_DMA_CHANNELS)
- return;
- chan = &au1000_dma_table[dmanr];
-
- printk(KERN_INFO "Au1000 DMA%d Register Dump:\n", dmanr);
- printk(KERN_INFO " mode = 0x%08x\n",
- __raw_readl(chan->io + DMA_MODE_SET));
- printk(KERN_INFO " addr = 0x%08x\n",
- __raw_readl(chan->io + DMA_PERIPHERAL_ADDR));
- printk(KERN_INFO " start0 = 0x%08x\n",
- __raw_readl(chan->io + DMA_BUFFER0_START));
- printk(KERN_INFO " start1 = 0x%08x\n",
- __raw_readl(chan->io + DMA_BUFFER1_START));
- printk(KERN_INFO " count0 = 0x%08x\n",
- __raw_readl(chan->io + DMA_BUFFER0_COUNT));
- printk(KERN_INFO " count1 = 0x%08x\n",
- __raw_readl(chan->io + DMA_BUFFER1_COUNT));
-}
-
/*
* Finds a free channel, and binds the requested device to it.
* Returns the allocated channel number, or negative on error.
diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c
index 1b16daaa86ae..411f70ceb762 100644
--- a/arch/mips/alchemy/common/gpiolib.c
+++ b/arch/mips/alchemy/common/gpiolib.c
@@ -119,9 +119,11 @@ static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off)
return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE);
}
-static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)
+static int alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)
{
au1300_gpio_set_value(off + AU1300_GPIO_BASE, v);
+
+ return 0;
}
static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off)
@@ -145,7 +147,7 @@ static struct gpio_chip au1300_gpiochip = {
.direction_input = alchemy_gpic_dir_input,
.direction_output = alchemy_gpic_dir_output,
.get = alchemy_gpic_get,
- .set = alchemy_gpic_set,
+ .set_rv = alchemy_gpic_set,
.to_irq = alchemy_gpic_gpio_to_irq,
.base = AU1300_GPIO_BASE,
.ngpio = AU1300_GPIO_NUM,
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index d4ab34b3b404..da74cae6b43a 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -409,8 +409,8 @@ static void __init alchemy_setup_macs(int ctype)
if (alchemy_get_macs(ctype) < 1)
return;
- macres = kmemdup(au1xxx_eth0_resources[ctype],
- sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
+ macres = kmemdup_array(au1xxx_eth0_resources[ctype], MAC_RES_COUNT,
+ sizeof(*macres), GFP_KERNEL);
if (!macres) {
printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
return;
@@ -430,8 +430,8 @@ static void __init alchemy_setup_macs(int ctype)
if (alchemy_get_macs(ctype) < 2)
return;
- macres = kmemdup(au1xxx_eth1_resources[ctype],
- sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
+ macres = kmemdup_array(au1xxx_eth1_resources[ctype], MAC_RES_COUNT,
+ sizeof(*macres), GFP_KERNEL);
if (!macres) {
printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
return;
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c
index 7b9f91db227f..6984cd5169b5 100644
--- a/arch/mips/alchemy/devboards/db1000.c
+++ b/arch/mips/alchemy/devboards/db1000.c
@@ -10,15 +10,16 @@
#include <linux/dma-mapping.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
+#include <linux/gpio/property.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/mmc/host.h>
#include <linux/platform_device.h>
+#include <linux/property.h>
#include <linux/pm.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
-#include <linux/spi/ads7846.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/gpio-au1000.h>
#include <asm/mach-au1x00/au1000_dma.h>
@@ -374,22 +375,20 @@ static struct platform_device db1100_mmc1_dev = {
/******************************************************************************/
-static struct ads7846_platform_data db1100_touch_pd = {
- .model = 7846,
- .vref_mv = 3300,
+static const struct software_node db1100_alchemy2_gpiochip = {
+ .name = "alchemy-gpio2",
};
-static struct spi_gpio_platform_data db1100_spictl_pd = {
- .num_chipselect = 1,
+static const struct property_entry db1100_ads7846_properties[] = {
+ PROPERTY_ENTRY_U16("ti,vref_min", 3300),
+ PROPERTY_ENTRY_GPIO("pendown-gpios",
+ &db1100_alchemy2_gpiochip, 21, GPIO_ACTIVE_LOW),
+ { }
};
-static struct gpiod_lookup_table db1100_touch_gpio_table = {
- .dev_id = "spi0.0",
- .table = {
- GPIO_LOOKUP("alchemy-gpio2", 21,
- "pendown", GPIO_ACTIVE_LOW),
- { }
- },
+static const struct software_node db1100_ads7846_swnode = {
+ .name = "ads7846",
+ .properties = db1100_ads7846_properties,
};
static struct spi_board_info db1100_spi_info[] __initdata = {
@@ -400,37 +399,37 @@ static struct spi_board_info db1100_spi_info[] __initdata = {
.chip_select = 0,
.mode = 0,
.irq = AU1100_GPIO21_INT,
- .platform_data = &db1100_touch_pd,
+ .swnode = &db1100_ads7846_swnode,
},
};
-static struct platform_device db1100_spi_dev = {
- .name = "spi_gpio",
- .id = 0,
- .dev = {
- .platform_data = &db1100_spictl_pd,
- .dma_mask = &au1xxx_all_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
+static const struct spi_gpio_platform_data db1100_spictl_pd __initconst = {
+ .num_chipselect = 1,
};
/*
* Alchemy GPIO 2 has its base at 200 so the GPIO lines
* 207 thru 210 are GPIOs at offset 7 thru 10 at this chip.
*/
-static struct gpiod_lookup_table db1100_spi_gpiod_table = {
- .dev_id = "spi_gpio",
- .table = {
- GPIO_LOOKUP("alchemy-gpio2", 9,
- "sck", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("alchemy-gpio2", 8,
- "mosi", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("alchemy-gpio2", 7,
- "miso", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("alchemy-gpio2", 10,
- "cs", GPIO_ACTIVE_HIGH),
- { },
- },
+static const struct property_entry db1100_spi_dev_properties[] __initconst = {
+ PROPERTY_ENTRY_GPIO("miso-gpios",
+ &db1100_alchemy2_gpiochip, 7, GPIO_ACTIVE_HIGH),
+ PROPERTY_ENTRY_GPIO("mosi-gpios",
+ &db1100_alchemy2_gpiochip, 8, GPIO_ACTIVE_HIGH),
+ PROPERTY_ENTRY_GPIO("sck-gpios",
+ &db1100_alchemy2_gpiochip, 9, GPIO_ACTIVE_HIGH),
+ PROPERTY_ENTRY_GPIO("cs-gpios",
+ &db1100_alchemy2_gpiochip, 10, GPIO_ACTIVE_HIGH),
+ { }
+};
+
+static const struct platform_device_info db1100_spi_dev_info __initconst = {
+ .name = "spi_gpio",
+ .id = 0,
+ .data = &db1100_spictl_pd,
+ .size_data = sizeof(db1100_spictl_pd),
+ .dma_mask = DMA_BIT_MASK(32),
+ .properties = db1100_spi_dev_properties,
};
static struct platform_device *db1x00_devs[] = {
@@ -452,8 +451,10 @@ int __init db1000_dev_setup(void)
{
int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1;
+ int err;
unsigned long pfc;
struct clk *c, *p;
+ struct platform_device *spi_dev;
if (board == BCSR_WHOAMI_DB1500) {
c0 = AU1500_GPIO2_INT;
@@ -480,7 +481,7 @@ int __init db1000_dev_setup(void)
pfc |= (1 << 0); /* SSI0 pins as GPIOs */
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
- gpiod_add_lookup_table(&db1100_touch_gpio_table);
+ software_node_register(&db1100_alchemy2_gpiochip);
spi_register_board_info(db1100_spi_info,
ARRAY_SIZE(db1100_spi_info));
@@ -497,8 +498,11 @@ int __init db1000_dev_setup(void)
clk_put(p);
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
- gpiod_add_lookup_table(&db1100_spi_gpiod_table);
- platform_device_register(&db1100_spi_dev);
+
+ spi_dev = platform_device_register_full(&db1100_spi_dev_info);
+ err = PTR_ERR_OR_ZERO(spi_dev);
+ if (err)
+ pr_err("failed to register SPI controller: %d\n", err);
} else if (board == BCSR_WHOAMI_DB1000) {
c0 = AU1000_GPIO2_INT;
c1 = AU1000_GPIO5_INT;
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.