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path: root/drivers/iio/proximity/sx9324.c
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Diffstat (limited to 'drivers/iio/proximity/sx9324.c')
-rw-r--r--drivers/iio/proximity/sx9324.c96
1 files changed, 50 insertions, 46 deletions
diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c
index 977cf17cec52..9a40ca32bb1c 100644
--- a/drivers/iio/proximity/sx9324.c
+++ b/drivers/iio/proximity/sx9324.c
@@ -783,73 +783,75 @@ static int sx9324_write_raw(struct iio_dev *indio_dev,
static const struct sx_common_reg_default sx9324_default_regs[] = {
{ SX9324_REG_IRQ_MSK, 0x00 },
- { SX9324_REG_IRQ_CFG0, 0x00 },
- { SX9324_REG_IRQ_CFG1, SX9324_REG_IRQ_CFG1_FAILCOND },
- { SX9324_REG_IRQ_CFG2, 0x00 },
- { SX9324_REG_GNRL_CTRL0, SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS },
+ { SX9324_REG_IRQ_CFG0, 0x00, "irq_cfg0" },
+ { SX9324_REG_IRQ_CFG1, SX9324_REG_IRQ_CFG1_FAILCOND, "irq_cfg1" },
+ { SX9324_REG_IRQ_CFG2, 0x00, "irq_cfg2" },
+ { SX9324_REG_GNRL_CTRL0, SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS, "gnrl_ctrl0" },
/*
* The lower 4 bits should not be set as it enable sensors measurements.
* Turning the detection on before the configuration values are set to
* good values can cause the device to return erroneous readings.
*/
- { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL },
+ { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL, "gnrl_ctrl1" },
- { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST },
- { SX9324_REG_AFE_CTRL3, 0x00 },
+ { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST, "afe_ctrl0" },
+ { SX9324_REG_AFE_CTRL3, 0x00, "afe_ctrl3" },
{ SX9324_REG_AFE_CTRL4, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ |
- SX9324_REG_AFE_CTRL4_RES_100 },
- { SX9324_REG_AFE_CTRL6, 0x00 },
+ SX9324_REG_AFE_CTRL4_RES_100, "afe_ctrl4" },
+ { SX9324_REG_AFE_CTRL6, 0x00, "afe_ctrl6" },
{ SX9324_REG_AFE_CTRL7, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ |
- SX9324_REG_AFE_CTRL4_RES_100 },
+ SX9324_REG_AFE_CTRL4_RES_100, "afe_ctrl7" },
/* TODO(gwendal): PHx use chip default or all grounded? */
- { SX9324_REG_AFE_PH0, 0x29 },
- { SX9324_REG_AFE_PH1, 0x26 },
- { SX9324_REG_AFE_PH2, 0x1a },
- { SX9324_REG_AFE_PH3, 0x16 },
+ { SX9324_REG_AFE_PH0, 0x29, "afe_ph0" },
+ { SX9324_REG_AFE_PH1, 0x26, "afe_ph1" },
+ { SX9324_REG_AFE_PH2, 0x1a, "afe_ph2" },
+ { SX9324_REG_AFE_PH3, 0x16, "afe_ph3" },
{ SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESERVED |
- SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM },
- { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 },
+ SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM, "afe_ctrl8" },
+ { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1, "afe_ctrl9" },
{ SX9324_REG_PROX_CTRL0,
SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
- SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
+ SX9324_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0" },
{ SX9324_REG_PROX_CTRL1,
SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
- SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
- { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K },
+ SX9324_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl1" },
+ { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K, "prox_ctrl2" },
{ SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES |
- SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K },
+ SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K, "prox_ctrl3" },
{ SX9324_REG_PROX_CTRL4, SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 |
- SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256 },
- { SX9324_REG_PROX_CTRL5, 0x00 },
- { SX9324_REG_PROX_CTRL6, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 },
- { SX9324_REG_PROX_CTRL7, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 },
- { SX9324_REG_ADV_CTRL0, 0x00 },
- { SX9324_REG_ADV_CTRL1, 0x00 },
- { SX9324_REG_ADV_CTRL2, 0x00 },
- { SX9324_REG_ADV_CTRL3, 0x00 },
- { SX9324_REG_ADV_CTRL4, 0x00 },
+ SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256, "prox_ctrl4" },
+ { SX9324_REG_PROX_CTRL5, 0x00, "prox_ctrl5" },
+ { SX9324_REG_PROX_CTRL6, SX9324_REG_PROX_CTRL6_PROXTHRESH_32, "prox_ctrl6" },
+ { SX9324_REG_PROX_CTRL7, SX9324_REG_PROX_CTRL6_PROXTHRESH_32, "prox_ctrl7" },
+ { SX9324_REG_ADV_CTRL0, 0x00, "adv_ctrl0" },
+ { SX9324_REG_ADV_CTRL1, 0x00, "adv_ctrl1" },
+ { SX9324_REG_ADV_CTRL2, 0x00, "adv_ctrl2" },
+ { SX9324_REG_ADV_CTRL3, 0x00, "adv_ctrl3" },
+ { SX9324_REG_ADV_CTRL4, 0x00, "adv_ctrl4" },
{ SX9324_REG_ADV_CTRL5, SX9324_REG_ADV_CTRL5_STARTUP_SENSOR_1 |
- SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1 },
- { SX9324_REG_ADV_CTRL6, 0x00 },
- { SX9324_REG_ADV_CTRL7, 0x00 },
- { SX9324_REG_ADV_CTRL8, 0x00 },
- { SX9324_REG_ADV_CTRL9, 0x00 },
+ SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1, "adv_ctrl5" },
+ { SX9324_REG_ADV_CTRL6, 0x00, "adv_ctrl6" },
+ { SX9324_REG_ADV_CTRL7, 0x00, "adv_ctrl7" },
+ { SX9324_REG_ADV_CTRL8, 0x00, "adv_ctrl8" },
+ { SX9324_REG_ADV_CTRL9, 0x00, "adv_ctrl9" },
/* Body/Table threshold */
- { SX9324_REG_ADV_CTRL10, 0x00 },
- { SX9324_REG_ADV_CTRL11, 0x00 },
- { SX9324_REG_ADV_CTRL12, 0x00 },
+ { SX9324_REG_ADV_CTRL10, 0x00, "adv_ctrl10" },
+ { SX9324_REG_ADV_CTRL11, 0x00, "adv_ctrl11" },
+ { SX9324_REG_ADV_CTRL12, 0x00, "adv_ctrl12" },
/* TODO(gwendal): SAR currenly disabled */
- { SX9324_REG_ADV_CTRL13, 0x00 },
- { SX9324_REG_ADV_CTRL14, 0x00 },
- { SX9324_REG_ADV_CTRL15, 0x00 },
- { SX9324_REG_ADV_CTRL16, 0x00 },
- { SX9324_REG_ADV_CTRL17, 0x00 },
- { SX9324_REG_ADV_CTRL18, 0x00 },
- { SX9324_REG_ADV_CTRL19, SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION },
- { SX9324_REG_ADV_CTRL20, SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION },
+ { SX9324_REG_ADV_CTRL13, 0x00, "adv_ctrl13" },
+ { SX9324_REG_ADV_CTRL14, 0x00, "adv_ctrl14" },
+ { SX9324_REG_ADV_CTRL15, 0x00, "adv_ctrl15" },
+ { SX9324_REG_ADV_CTRL16, 0x00, "adv_ctrl16" },
+ { SX9324_REG_ADV_CTRL17, 0x00, "adv_ctrl17" },
+ { SX9324_REG_ADV_CTRL18, 0x00, "adv_ctrl18" },
+ { SX9324_REG_ADV_CTRL19,
+ SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION, "adv_ctrl19" },
+ { SX9324_REG_ADV_CTRL20,
+ SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION, "adv_ctrl20" },
};
/* Activate all channels and perform an initial compensation. */
@@ -889,13 +891,15 @@ sx9324_get_default_reg(struct device *dev, int idx,
const char *res;
memcpy(reg_def, &sx9324_default_regs[idx], sizeof(*reg_def));
+
+ sx_common_get_raw_register_config(dev, reg_def);
switch (reg_def->reg) {
case SX9324_REG_AFE_PH0:
case SX9324_REG_AFE_PH1:
case SX9324_REG_AFE_PH2:
case SX9324_REG_AFE_PH3:
ph = reg_def->reg - SX9324_REG_AFE_PH0;
- scnprintf(prop, ARRAY_SIZE(prop), "semtech,ph%d-pin", ph);
+ snprintf(prop, ARRAY_SIZE(prop), "semtech,ph%d-pin", ph);
count = device_property_count_u32(dev, prop);
if (count != ARRAY_SIZE(pin_defs))