diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json | 492 |
1 files changed, 450 insertions, 42 deletions
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json index dd1b95655d1d..c391325ee36b 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json @@ -1,92 +1,500 @@ [ { - "BriefDescription": "PCU clock ticks. Use to get percentages of PCU cycles events", - "Counter": "0,1,2,3", + "BriefDescription": "pclk Cycles", "EventName": "UNC_P_CLOCKTICKS", "PerPkg": "1", + "PublicDescription": "The PCU runs off a fixed 800 MHz clock. This event counts the number of pclk cycles measured while the counter was enabled. The pclk, like the Memory Controller's dclk, counts at a constant rate making it a good measure of actual wall time.", "Unit": "PCU" }, { - "BriefDescription": "This is an occupancy event that tracks the number of cores that are in C0. It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events and occupancy triggering to capture other details", - "Counter": "0,1,2,3", + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x60", + "EventName": "UNC_P_CORE0_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6A", + "EventName": "UNC_P_CORE10_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6B", + "EventName": "UNC_P_CORE11_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6C", + "EventName": "UNC_P_CORE12_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6D", + "EventName": "UNC_P_CORE13_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6E", + "EventName": "UNC_P_CORE14_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x6F", + "EventName": "UNC_P_CORE15_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x70", + "EventName": "UNC_P_CORE16_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x71", + "EventName": "UNC_P_CORE17_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x61", + "EventName": "UNC_P_CORE1_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x62", + "EventName": "UNC_P_CORE2_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x63", + "EventName": "UNC_P_CORE3_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x64", + "EventName": "UNC_P_CORE4_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x65", + "EventName": "UNC_P_CORE5_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x66", + "EventName": "UNC_P_CORE6_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x67", + "EventName": "UNC_P_CORE7_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x68", + "EventName": "UNC_P_CORE8_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Transition Cycles", + "EventCode": "0x69", + "EventName": "UNC_P_CORE9_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions. There is one event per core.", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x30", + "EventName": "UNC_P_DEMOTIONS_CORE0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x31", + "EventName": "UNC_P_DEMOTIONS_CORE1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3A", + "EventName": "UNC_P_DEMOTIONS_CORE10", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3B", + "EventName": "UNC_P_DEMOTIONS_CORE11", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3C", + "EventName": "UNC_P_DEMOTIONS_CORE12", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3D", + "EventName": "UNC_P_DEMOTIONS_CORE13", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3E", + "EventName": "UNC_P_DEMOTIONS_CORE14", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x3F", + "EventName": "UNC_P_DEMOTIONS_CORE15", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x40", + "EventName": "UNC_P_DEMOTIONS_CORE16", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x41", + "EventName": "UNC_P_DEMOTIONS_CORE17", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x32", + "EventName": "UNC_P_DEMOTIONS_CORE2", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x33", + "EventName": "UNC_P_DEMOTIONS_CORE3", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x34", + "EventName": "UNC_P_DEMOTIONS_CORE4", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x35", + "EventName": "UNC_P_DEMOTIONS_CORE5", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x36", + "EventName": "UNC_P_DEMOTIONS_CORE6", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x37", + "EventName": "UNC_P_DEMOTIONS_CORE7", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x38", + "EventName": "UNC_P_DEMOTIONS_CORE8", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Core C State Demotions", + "EventCode": "0x39", + "EventName": "UNC_P_DEMOTIONS_CORE9", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", + "Unit": "PCU" + }, + { + "BriefDescription": "Frequency Residency", + "EventCode": "0xB", + "EventName": "UNC_P_FREQ_BAND0_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the uncore was running at a frequency greater than or equal to the frequency that is configured in the filter. One can use all four counters with this event, so it is possible to track up to 4 configurable bands. One can use edge detect in conjunction with this event to track the number of times that we transitioned into a frequency greater than or equal to the configurable frequency. One can also use inversion to track cycles when we were less than the configured frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Frequency Residency", + "EventCode": "0xC", + "EventName": "UNC_P_FREQ_BAND1_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the uncore was running at a frequency greater than or equal to the frequency that is configured in the filter. One can use all four counters with this event, so it is possible to track up to 4 configurable bands. One can use edge detect in conjunction with this event to track the number of times that we transitioned into a frequency greater than or equal to the configurable frequency. One can also use inversion to track cycles when we were less than the configured frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Frequency Residency", + "EventCode": "0xD", + "EventName": "UNC_P_FREQ_BAND2_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the uncore was running at a frequency greater than or equal to the frequency that is configured in the filter. One can use all four counters with this event, so it is possible to track up to 4 configurable bands. One can use edge detect in conjunction with this event to track the number of times that we transitioned into a frequency greater than or equal to the configurable frequency. One can also use inversion to track cycles when we were less than the configured frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Frequency Residency", + "EventCode": "0xE", + "EventName": "UNC_P_FREQ_BAND3_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the uncore was running at a frequency greater than or equal to the frequency that is configured in the filter. One can use all four counters with this event, so it is possible to track up to 4 configurable bands. One can use edge detect in conjunction with this event to track the number of times that we transitioned into a frequency greater than or equal to the configurable frequency. One can also use inversion to track cycles when we were less than the configured frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Thermal Strongest Upper Limit Cycles", + "EventCode": "0x4", + "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when thermal conditions are the upper limit on frequency. This is related to the THERMAL_THROTTLE CYCLES_ABOVE_TEMP event, which always counts cycles when we are above the thermal temperature. This event (STRONGEST_UPPER_LIMIT) is sampled at the output of the algorithm that determines the actual frequency, while THERMAL_THROTTLE looks at the input.", + "Unit": "PCU" + }, + { + "BriefDescription": "OS Strongest Upper Limit Cycles", + "EventCode": "0x6", + "EventName": "UNC_P_FREQ_MAX_OS_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the OS is the upper limit on frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Power Strongest Upper Limit Cycles", + "EventCode": "0x5", + "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when power is the upper limit on frequency.", + "Unit": "PCU" + }, + { + "BriefDescription": "IO P Limit Strongest Lower Limit Cycles", + "EventCode": "0x73", + "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when IO P Limit is preventing us from dropping the frequency lower. This algorithm monitors the needs to the IO subsystem on both local and remote sockets and will maintain a frequency high enough to maintain good IO BW. This is necessary for when all the IA cores on a socket are idle but a user still would like to maintain high IO Bandwidth.", + "Unit": "PCU" + }, + { + "BriefDescription": "Cycles spent changing Frequency", + "EventCode": "0x74", + "EventName": "UNC_P_FREQ_TRANS_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the system is changing frequency. This can not be filtered by thread ID. One can also use it with the occupancy counter that monitors number of threads in C0 to estimate the performance impact that frequency transitions had on the system.", + "Unit": "PCU" + }, + { + "BriefDescription": "Memory Phase Shedding Cycles", + "EventCode": "0x2F", + "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the PCU has triggered memory phase shedding. This is a mode that can be run in the iMC physicals that saves power at the expense of additional latency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C0", + "EventCode": "0x2A", + "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C0. This event can be used in conjunction with edge detect to count C0 entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C1E", + "EventCode": "0x4E", + "EventName": "UNC_P_PKG_RESIDENCY_C1E_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C1E. This event can be used in conjunction with edge detect to count C1E entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C2E", + "EventCode": "0x2B", + "EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C2E. This event can be used in conjunction with edge detect to count C2E entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C3", + "EventCode": "0x2C", + "EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C3. This event can be used in conjunction with edge detect to count C3 entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C6", + "EventCode": "0x2D", + "EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C6. This event can be used in conjunction with edge detect to count C6 entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C7 State Residency", + "EventCode": "0x2E", + "EventName": "UNC_P_PKG_RESIDENCY_C7_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the package was in C7. This event can be used in conjunction with edge detect to count C7 entrances (or exits using invert). Residency events do not include transition times.", + "Unit": "PCU" + }, + { + "BriefDescription": "Number of cores in C-State; C0 and C1", "EventCode": "0x80", "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0", "Filter": "occ_sel=1", - "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "power_state_occupancy.cores_c0 %", "PerPkg": "1", + "PublicDescription": "This is an occupancy event that tracks the number of cores that are in the chosen C-State. It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.", "Unit": "PCU" }, { - "BriefDescription": "This is an occupancy event that tracks the number of cores that are in C3. It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events and occupancy triggering to capture other details", - "Counter": "0,1,2,3", + "BriefDescription": "Number of cores in C-State; C3", "EventCode": "0x80", "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3", "Filter": "occ_sel=2", - "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "power_state_occupancy.cores_c3 %", "PerPkg": "1", + "PublicDescription": "This is an occupancy event that tracks the number of cores that are in the chosen C-State. It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.", "Unit": "PCU" }, { - "BriefDescription": "This is an occupancy event that tracks the number of cores that are in C6. It can be used by itself to get the average number of cores in C0, with threshholding to generate histograms, or with other PCU events ", - "Counter": "0,1,2,3", + "BriefDescription": "Number of cores in C-State; C6 and C7", "EventCode": "0x80", "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6", "Filter": "occ_sel=3", - "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "power_state_occupancy.cores_c6 %", "PerPkg": "1", + "PublicDescription": "This is an occupancy event that tracks the number of cores that are in the chosen C-State. It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.", "Unit": "PCU" }, { - "BriefDescription": "Counts the number of cycles that we are in external PROCHOT mode. This mode is triggered when a sensor off the die determines that something off-die (like DRAM) is too hot and must throttle to avoid damaging the chip", - "Counter": "0,1,2,3", + "BriefDescription": "External Prochot", "EventCode": "0xA", "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES", - "MetricExpr": "(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "prochot_external_cycles %", "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that we are in external PROCHOT mode. This mode is triggered when a sensor off the die determines that something off-die (like DRAM) is too hot and must throttle to avoid damaging the chip.", "Unit": "PCU" }, { - "BriefDescription": "Counts the number of cycles when temperature is the upper limit on frequency", - "Counter": "0,1,2,3", - "EventCode": "0x4", - "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES", - "MetricExpr": "(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "freq_max_limit_thermal_cycles %", + "BriefDescription": "Internal Prochot", + "EventCode": "0x9", + "EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES", "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that we are in Internal PROCHOT mode. This mode is triggered when a sensor on the die determines that we are too hot and must throttle to avoid damaging the chip.", "Unit": "PCU" }, { - "BriefDescription": "Counts the number of cycles when the OS is the upper limit on frequency", - "Counter": "0,1,2,3", - "EventCode": "0x6", - "EventName": "UNC_P_FREQ_MAX_OS_CYCLES", - "MetricExpr": "(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "freq_max_os_cycles %", + "BriefDescription": "Total Core C State Transition Cycles", + "EventCode": "0x72", + "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES", "PerPkg": "1", + "PublicDescription": "Number of cycles spent performing core C state transitions across all cores.", "Unit": "PCU" }, { - "BriefDescription": "Counts the number of cycles when power is the upper limit on frequency", - "Counter": "0,1,2,3", - "EventCode": "0x5", - "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES", - "MetricExpr": "(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "freq_max_power_cycles %", + "BriefDescription": "UNC_P_UFS_TRANSITIONS_NO_CHANGE", + "EventCode": "0x79", + "EventName": "UNC_P_UFS_TRANSITIONS_NO_CHANGE", "PerPkg": "1", + "PublicDescription": "Ring GV with same final and initial frequency", "Unit": "PCU" }, { - "BriefDescription": "Counts the number of cycles when current is the upper limit on frequency", - "Counter": "0,1,2,3", - "EventCode": "0x74", - "EventName": "UNC_P_FREQ_TRANS_CYCLES", - "MetricExpr": "(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.", - "MetricName": "freq_trans_cycles %", + "BriefDescription": "UNC_P_UFS_TRANSITIONS_RING_GV", + "EventCode": "0x79", + "EventName": "UNC_P_UFS_TRANSITIONS_RING_GV", + "PerPkg": "1", + "PublicDescription": "Ring GV with same final and initial frequency", + "Unit": "PCU" + }, + { + "BriefDescription": "VR Hot", + "EventCode": "0x42", + "EventName": "UNC_P_VR_HOT_CYCLES", "PerPkg": "1", + "PublicDescription": "VR Hot : Number of cycles that a CPU SVID VR is hot. Does not cover DRAM VRs", "Unit": "PCU" } ] |