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2026-07-15gpu: nova-core: store Fsp instance in GpuAlexandre Courbot4-13/+38
The `Fsp` instance was only used in the Hopper+ boot path, and consequently built locally (and immediately dropped) in it. This worked well as a temporary measure, but the FSP is a GPU sub-device, so its lifetime should match the GPU rather than a single boot invocation. It will also be needed in other parts of the driver, for instance vGPU. Thus, create the `Fsp` instance in the `Gpu` constructor and store it there, passing it to the GSP boot as a mutable reference using `GspBootContext`. This makes the `Fsp` available even after the GSP is booted. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-13-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: separate context and GPU lifetimes in GspBootContextAlexandre Courbot6-18/+28
`Falcon` instances retain references tied to the lifetime of the bound GPU. `GspBootContext` currently uses that same lifetime for its own borrows of the `Falcon` instances and other references. But these lifetimes are independent: the references captured by a `Falcon` remain valid for the GPU lifetime, while the context only borrows the `Falcon` for the duration of a boot or unload operation. This distinction is hidden for shared references by covariance, but cannot be ignored anymore if the context carries mutable references to GPU subdevices, as will happen for the `Fsp` and the `Falcon`s. Thus, give `GspBootContext` separate lifetimes for its subdevice borrows and the GPU resources captured by those subdevices, and update its users accordingly. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-12-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: pass GspBootContext mutablyAlexandre Courbot4-21/+28
We want to move the `Fsp` instance into `Gpu`, which will require passing it as a mutable reference in `GspBootContext`, since `Fsp::boot_fmc` is a mutable method. In order to use the mutable references it contains, `GspBootContext` must also be mutable. We will also follow up by making some methods of the `Falcon`s mutable, which also requires passing them as mutable references. Thus, make the `GspBootContext` passed to `Gsp::boot` and `Gsp::unload` mutable, and pass mutable references to it to the GSP boot HAL methods. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-11-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: avoid repeated calls to pci::Device::as_refAlexandre Courbot1-11/+13
Add a local `Device` reference created from the `pci::Device` in the `Gpu` constructor to avoid repeatedly calling `as_ref`. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-10-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: move GSP firmware files decision to GSP HALEliot Courtney5-33/+33
The files to give the `ModInfoBuilder` depend on the chipset; this is HAL information, so move it there. Doing so lets us remove the `uses_fsp` and `needs_fwsec_bootloader` ad-hoc methods of `Chipset`. Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-9-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: make use of FWSEC bootloader a property of the TU102 HALAlexandre Courbot3-5/+29
By being in the TU102 HAL, we already know that the GSP boot method is the SEC2 Booter, so the only variable is whether the FWSEC bootloader is used or not. Since `Chipset` also includes the variants that boot FSP, querying it for that information introduces a potential code path (a chipset that boots via FSP) that the current code doesn't handle. Turn the use of the FWSEC bootloader into a property of the `Tu102` HAL, and give GA102+ chipsets their own instance with that property set to `false`. This removes the invalid code path and the only use of `Chipset` is now to load the correct firmware files. This also removes some uses of the `Chipset::needs_fwsec_bootloader` method and prepares the ground for removing it. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-8-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: turn FWSEC execution into HAL methodAlexandre Courbot1-75/+76
Turn the `run_fwsec_frts` function into a method of `Tu102`. A following patch will turn the "use FWSEC bootloader" property into a flag of the TU102 HAL itself, and making this a method will allow the code to access it instead of querying `Chipset`. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-7-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: fold TU102 unload bundle construction into HAL methodAlexandre Courbot1-46/+39
The construction of the unload bundle is currently a bit convoluted and could be done in one function instead of two. Additionally, turn that function into a method of `Tu102`. A following patch will turn the "use FWSEC bootloader" property into a flag of the TU102 HAL itself, and making this a method will allow the code to access it instead of querying `Chipset`. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-6-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: centralize missing unload bundle warningsAlexandre Courbot2-9/+10
The warning emitted when the unload bundle cannot be constructed is valid regardless of the boot method, but it was local to `Tu102`. Move it to `Gsp::boot` so it applies to all boot methods. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-5-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: pass GspBootContext to unload methodsAlexandre Courbot5-57/+45
`GspBootContext` contains the resources required to boot the GSP. As it turns out, this is also the context required for unloading it. Reflect that fact by replacing the arguments of `Gsp::unload` and `UnloadBundle::run` with the `GspBootContext`. This symmetry between `Gsp::boot` and `Gsp::unload` will also be convenient when we want to make these methods generic over the boot context corresponding to the boot method used. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-4-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: replace BootUnloadGuard with local handlersAlexandre Courbot4-89/+41
When adding the GSP unload capability, we introduced `BootUnloadGuard` to automatically call `Gsp::unload` whenever an error occurred during the boot process, in order to try to reset the GSP to a valid state. This approach is not well-suited to the errors that may occur in HALs: by definition, an error occurring in the HAL means that the GSP is not booted; yet the first thing that `Gsp::unload` does is queue a shutdown message to the GSP, which will inevitably result in a timeout when done from a HAL. Furthermore, `BootUnloadGuard` is problematic because it holds additional references to the boot context, notably the `Falcon`s. These extra references stand in the way of making some of the `Falcon`'s methods mutable, since those methods would require exclusive access. As this behavior is only needed in one place, introducing dedicated types for it is distracting and unnecessary. Thus, remove `BootUnloadGuard` and adopt a two-level error handling strategy: - HALs are free to handle their errors as they see fit (most likely, by running their unload bundle if it is ready by the time of the error), - `Gsp::boot` uses a `ScopeGuard` that runs `Gsp::unload`, since the GSP should be up and running by the time `GspHal::boot` has returned. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-3-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: sequencer: do not store sequence into GspSequencerAlexandre Courbot1-20/+15
The sequence is currently stored in the `GspSequencer` even though its lifetime is limited to `GspSequencer::run`. This object-oriented design does not play well with the borrow-checker, as `GspSequencer::iter` borrows the `GspSequencer`, which makes it difficult to introduce mutable references in `GspBootContext`, as we want to do in order to make the `Falcon` references mutable. Thus, store the sequence locally in `GspSequencer::run`, and move iterator creation to `GspSeqIter::new` so it no longer needs to borrow the whole `GspSequencer`. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-2-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15gpu: nova-core: gsp: sequencer: use GspBootContextAlexandre Courbot2-37/+20
`GspBootContext` contains all the resources currently carried by `GspSequencerParams`, so replace the latter with the former for better integration with the boot process and less code. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260709-nova-bootcontext-v6-1-520cbf8b9b50@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-15Merge tag 'linux_kselftest-fixes-7.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftestLinus Torvalds2-11/+20
Pull kselftest fixes from Shuah Khan: - Fix ftrace reading enabled_func test in add_remove_fprobe_module test - Fix tracing trigger-hist-poll.tc to use sched_process_exit * tag 'linux_kselftest-fixes-7.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest: selftests/tracing: Have trigger-hist-poll.tc use sched_process_exit selftests/ftrace: Fix reading enabled_functions in add_remove_fprobe_module test
2026-07-15MAINTAINERS: add Rust SRCU files to SRCU entryOnur Özkan1-0/+3
Include Rust side implementation files to the SRCU maintainer entry. Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Boqun Feng <boqun@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15rust: sync: add SRCU abstractionOnur Özkan2-0/+173
Add a Rust abstraction for sleepable RCU (SRCU), backed by C srcu_struct. Provide FFI helpers and a safe wrapper with a guard-based API for read-side critical sections. Cleanup is handled via `PinnedDrop`. It first checks for active read-side sections and emits a warning if any guards were leaked. In that case, it waits in `synchronize_srcu()` rather than risking a UAF by freeing the `srcu_struct` that is still reachable from the C side. It then uses `srcu_barrier()` to drain pending callbacks before finally calling `cleanup_srcu_struct()`. Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Boqun Feng <boqun@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15srcu: expose srcu_readers_active()Onur Özkan5-26/+43
This is needed by rust/helpers/srcu.c which now adds rust_helper_srcu_readers_active() as a wrapper around the SRCU helper for Rust callers. To achive this: 1- Move the srcu_readers_active() implementation from "kernel/rcu/srcutree.c" to "include/linux/srcutree.h". 2- Implement a matching srcu_readers_active() in "include/linux/srcutiny.h" and use it on the existing open-coded WARN_ON() check in cleanup_srcu_struct(). Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Boqun Feng <boqun@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15rust: helpers: add SRCU helpersOnur Özkan2-0/+31
Add helper wrappers for SRCU functions that are exposed to Rust through generated bindings. Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Boqun Feng <boqun@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15srcu: make init_srcu_struct() consistently wrap __init_srcu_struct()Onur Özkan3-20/+32
Restructure the SRCU initialization functions so it always follows one direction: init_srcu_struct() -> __init_srcu_struct() -> lockdep or generic This uses the same wrapper style as mutex. It avoids the old confusing style where init_srcu_struct() and __init_srcu_struct() called each other in different configs. It also helps Rust side to have simpler helper for SRCU initialization. Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Boqun Feng <boqun@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15rcutorture: Abstract reader-segment dump into rcu_torture_dump_read_segs()Paul E. McKenney1-72/+76
This commit abstracts the open-coded dumping of reader segments in the rcu_torture_cleanup() function into a new rcu_torture_dump_read_segs() function. This abstraction will allow reader segments to be dumped for other purposes. Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15block: do not warn when doing greedy allocation in folio_alloc_greedy()Qu Wenruo1-1/+2
During one of my local btrfs fstests runs, folio_alloc() inside folio_alloc_greedy() triggered an allocation failure report when trying to allocate an order-4 folio. The kernel is from the latest development branch, which is utilizing the IOMAP_DIO_BOUNCE flag for direct writes when the inode requires checksum. Unfortunately I didn't save the full log, only the function and the order. When the IOMAP_DIO_BOUNCE flag is utilized, we will hit the following call chain: bio_iov_iter_bounce_write() |- folio_alloc_greedy() |- folio_alloc(gfp | __GFP_NORETRY, get_order(*size)); However __GFP_NORETRY will still emit an allocation failure report when it fails. And folio_alloc_greedy() will retry with a smaller order anyway, there is no point in emitting that allocation failure report. Append the __GFP_NOWARN flag to folio_alloc() for the larger-order folio attempts. Fixes: 8dd5e7c75d7b ("block: add helpers to bounce buffer an iov_iter into bios") Signed-off-by: Qu Wenruo <wqu@suse.com> Link: https://patch.msgid.link/d10571445ee505d95ba6eaad7558fc1f556d2921.1784020005.git.wqu@suse.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-07-15partitions: aix: bound the lvd scan to one sectorMichael Bommarito1-1/+8
aix_partition() reads the logical-volume descriptor array as a single sector and then scans it: if (numlvs && (d = read_part_sector(state, vgda_sector + 1, &sect))) { struct lvd *p = (struct lvd *)d; ... for (i = 0; foundlvs < numlvs && i < state->limit; i++) { lvip[i].pps_per_lv = be16_to_cpu(p[i].num_lps); p points at a single 512-byte sector, which holds SECTOR_SIZE / sizeof(struct lvd) = 16 entries, but the loop runs until foundlvs reaches the on-disk numlvs or i reaches state->limit (DISK_MAX_PARTS, 256). numlvs is an on-disk __be16 read straight from the volume group descriptor and is not validated, so a crafted AIX image with numlvs larger than 16 and lvd entries whose num_lps fields are zero (so foundlvs never advances) drives the loop to read p[i] well past the end of the read sector buffer. Commit d97a86c170b4 ("partitions: aix.c: off by one bug") hardened the matching write of lvip[lv_ix] in 2014 but left this read loop unbounded. Bound the scan to the number of struct lvd entries that fit in the sector that was actually read. Fixes: 6ceea22bbbc8 ("partitions: add aix lvm partition support files") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Michael Bommarito <michael.bommarito@gmail.com> Link: https://patch.msgid.link/20260714114806.3761553-1-michael.bommarito@gmail.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-07-15blk-cgroup: fix leaks and online flag on radix_tree_insert failureTao Cui1-2/+2
When radix_tree_insert() fails in blkg_create(), the error path has two issues: 1. blkg->online is set to true unconditionally, even when the blkg was never fully inserted. Move the assignment inside the success block. 2. The error path calls blkg_put() without first calling percpu_ref_kill(). Because the refcount is still in percpu mode, percpu_ref_put() only does this_cpu_sub() without checking for zero, so blkg_release() is never triggered. This permanently leaks the blkg memory, its percpu iostat, policy data, the parent blkg reference, and the cgroup css reference — the latter preventing the cgroup from ever being destroyed. Fix by replacing blkg_put() with percpu_ref_kill(), matching the pattern used in blkg_destroy(). Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Tao Cui <cuitao@kylinos.cn> Link: https://patch.msgid.link/20260715132407.1469777-1-cui.tao@linux.dev Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-07-15loop: remove manually added partitions on detachDaan De Meyer1-18/+14
Commit 267ec4d7223a ("loop: fix partition scan race between udev and loop_reread_partitions()") stopped disk_force_media_change() from setting GD_NEED_PART_SCAN because loop devices with LO_FLAGS_PARTSCAN rescan partitions explicitly. However, partitions can also be added manually with BLKPG while LO_FLAGS_PARTSCAN is clear. When such a loop device is detached, __loop_clr_fd() skips bdev_disk_changed(). Without GD_NEED_PART_SCAN, reopening the unbound device no longer performs the previous lazy cleanup, leaving dead partition devices behind. A subsequent LOOP_CONFIGURE can then fail its partition scan with -EBUSY, as seen in blktests loop/009 after loop/008. Call bdev_disk_changed() unconditionally during __loop_clr_fd(). The disk capacity is already zero and the release path holds open_mutex, so this drops all partitions without rescanning the detached backing file. The new blktests loop/013 case covers this sequence by adding a partition with BLKPG without LO_FLAGS_PARTSCAN, detaching the loop device, and checking that the partition is gone when the device is reopened. Fixes: 267ec4d7223a ("loop: fix partition scan race between udev and loop_reread_partitions()") Reported-by: kernel test robot <oliver.sang@intel.com> Closes: https://lore.kernel.org/oe-lkp/202607150754.b660f5b9-lkp@intel.com Signed-off-by: Daan De Meyer <daan@amutable.com> Link: https://patch.msgid.link/20260715-b4-loop-partition-cleanup-v1-1-b9f59910cd1e@amutable.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-07-15block: fix race in blk_time_get_ns() returning 0Mike Waychison1-3/+10
blk_time_get_ns() populates the per-plug cached timestamp and then returns it by re-reading the field: if (!plug->cur_ktime) { plug->cur_ktime = ktime_get_ns(); current->flags |= PF_BLOCK_TS; } return plug->cur_ktime; This is problematic when the compiler emits the final "return plug->cur_ktime" as a reload from memory, after PF_BLOCK_TS has already been set. Since the cached timestamp is now invalidated from finish_task_switch() (fad156c2af22 "block: invalidate cached plug timestamp after task switch"), a task preempted between setting PF_BLOCK_TS and that reload has plug->cur_ktime zeroed by blk_plug_invalidate_ts() when it is scheduled back in. The reload then returns 0. A 0 handed back here is stored as a start timestamp -- e.g. blk_account_io_start() writes it to rq->start_time_ns -- and later subtracted from "now". blk_account_io_done() then adds (now - 0), i.e. roughly the system uptime, to the per-group nsecs[] counters. On an otherwise idle, healthy device this appears as sudden ~uptime-sized jumps in the diskstats time fields (write_ticks/discard_ticks/time_in_queue). The solution is to be explicit in our reads and writes to this field that is preemption volatile. We also add a barrier() to ensure that any setting of PF_BLOCK_TS is ordered to happen after the cur_ktime update. This issue was discovered using AI-assisted kprobes looking for paths that were leaking zeroed timestamps in a live system, based on the observation that we were sometimes seeing uptime-sized jumps in kernel exported counters. This was flagged by NodeDiskIOSaturation prometheus alerts that started firing on all hosts post 7.1.3 kernel upgrade, due to node-exporter now exporting a nonsensical node_disk_io_time_weighted_seconds_total. Fixes: fad156c2af22 ("block: invalidate cached plug timestamp after task switch") Cc: stable@vger.kernel.org Signed-off-by: Mike Waychison <mike@waychison.com> Assisted-by: Claude:claude-opus-4.8 Link: https://patch.msgid.link/20260715192950.2488921-1-mike@waychison.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-07-15rcu-tasks: TASKS_TRACE_RCU doesn't need IRQ_WORKPaul E. McKenney1-1/+0
Now that Tasks Trace RCU is implemented in terms of SRCU, it no longer has any particular need for the IRQ_WORK Kconfig option. This commit therefore removes the "select IRQ_WORK" from the TASKS_TRACE_RCU Kconfig option. Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2026-07-15Input: wacom_w8001 - replace strlcat() with a strscpy() helperIan Bridges1-5/+12
In preparation for removing the strlcat() API[1], replace its five uses with a small append helper built on strnlen() and strscpy(). The five calls append device name fragments to a basename buffer that grows in place across the setup functions. The helper takes the same arguments as strlcat() and writes the same bytes, including when a fragment is truncated. Link: https://github.com/KSPP/linux/issues/370 [1] Signed-off-by: Ian Bridges <icb@fastmail.org> Link: https://patch.msgid.link/albg4Rv7QxvLJD05@dev Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2026-07-15Input: tca8418_keypad - enable overflow mode per datasheet (SCPS215G)Zhian Liang1-1/+2
The driver currently sets only the overflow interrupt enable bit (OVR_FLOW_IEN) in the configuration register, leaving the overflow mode bit (OVR_FLOW_M) at its default value of 0. According to the TCA8418 datasheet (SCPS215G, Section 8.6.4.1 "Overflow Errata - Description"), both OVR_FLOW_M (Bit_5) and OVR_FLOW_IEN (Bit_3) must be set high for the overflow interrupt to be generated. If only OVR_FLOW_IEN is set, FIFO overflow events are silently lost without notifying the host. Fix this by setting OVR_FLOW_M alongside OVR_FLOW_IEN in the configuration register. Signed-off-by: Zhian Liang <liangzhan5dev@gmail.com> Link: https://patch.msgid.link/20260529013900.43854-1-liangzhan5dev@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2026-07-15Merge tag 'scmi-ffa-fixes-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixesArnd Bergmann4-17/+33
Arm SCMI/FF-A fixes for v7.2 Fix two runtime issues in the SCMI framework. Use full 64-bit division when rounding range-based clock rates, avoiding divisor truncation and a possible divide-by-zero on 32-bit systems. Rate-limit notification queue-full warnings emitted from interrupt context to prevent printk floods and prolonged system stalls during notification bursts. Also correct a grammar error in the ARM_SCMI_POWER_CONTROL Kconfig help text. Fix the FF-A driver RX/TX buffer sizing logic to respect the maximum buffer size advertised by firmware, while retaining compatibility with older implementations that may reject PAGE_SIZE-rounded buffers. Also fix a NULL pointer dereference in ffa_partition_info_get() by rejecting NULL UUID strings before passing them to uuid_parse(). * tag 'scmi-ffa-fixes-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: Rate-limit queue-full warnings in IRQ context firmware: arm_scmi: Use 64-bit division for clock rate rounding firmware: arm_scmi: Grammar s/may needed/may be needed/ firmware: arm_ffa: Fix NULL dereference in ffa_partition_info_get() firmware: arm_ffa: Respect firmware advertised RX/TX buffer size limits Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-15dt-bindings: media: i2c: Add Sony IMX678Sakari Ailus1-0/+130
Really add Sony IMX678 bindings this time. Those were accidentally missed from commit 447ea0c26e57 ("dt-bindings: media: i2c: Add Sony IMX678") even though the original patch included them. Fixes: 447ea0c26e57 ("dt-bindings: media: i2c: Add Sony IMX678") Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Jai Luthra <jai.luthra@ideasonboard.com>
2026-07-15drm/xe/pt: Reset current_op in xe_pt_update_ops_init()Zongyao Bai1-0/+3
xe_pt_update_ops_init() fails to reset current_op to 0. On the vm_bind path, ops_execute() calls xe_pt_update_ops_prepare() inside the xe_validation_guard() / drm_exec_until_all_locked() loop. When that loop retries due to lock contention or OOM eviction (drm_exec_retry_on_contention() / xe_validation_retry_on_oom()), xe_pt_update_ops_prepare() runs again on the same vops, and each call to bind_op_prepare() increments current_op without resetting it. After N retries current_op exceeds the array size allocated by xe_vma_ops_alloc(), causing an out-of-bounds write into SLUB-poisoned memory and a subsequent UAF crash in xe_migrate_update_pgtables_cpu() when reading the corrupted pt_op->bind. Also reset needs_svm_lock and needs_invalidation which are derived in the same prepare pass and would otherwise cause wrong migrate ops selection and redundant TLB invalidation on retry. Fix this by resetting current_op, needs_svm_lock and needs_invalidation in xe_pt_update_ops_init(). v2 (Matt): - Add details in commit message. - Add Fixes tag and Cc to stable@vger.kernel.org Fixes: e8babb280b5e ("drm/xe: Convert multiple bind ops into single job") Suggested-by: Matthew Auld <matthew.auld@intel.com> Cc: stable@vger.kernel.org Assisted-by: GitHub-Copilot:claude-sonnet-4.6 Signed-off-by: Zongyao Bai <zongyao.bai@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260714232433.2737533-1-zongyao.bai@intel.com
2026-07-15arm64: dts: qcom: eliza-mtp: Enable touchscreenAbel Vesa1-0/+39
The Eliza MTP uses a Goodix GT9916 touchscreen controller connected over SPI. Describe the controller, its power supply, interrupt and reset GPIOs to enable touchscreen support. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260708-dts-qcom-eliza-mtp-enable-ts-v1-1-372020a7a86b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: purwa-iot-som: enable videoWangao Wang1-0/+4
Enable video nodes on the purwa-iot-som board. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260713-enable_iris_on_purwa-v9-2-633d7b87f0c9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: purwa: Override Iris clocks and operating pointsWangao Wang1-0/+50
The Iris block on X1P differs from SM8550/X1E in its clock configuration and requires a dedicated OPP table. The node inherited from the X1E cannot be reused directly, and the fallback compatible "qcom,sm8550-iris" cannot be applied. Override the inherited clocks, clock-names, and operating points, and replaces them with the X1P42100-specific definitions. A new OPP table is provided to support the correct performance levels on this platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260713-enable_iris_on_purwa-v9-1-633d7b87f0c9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: sm8450: Add mode-switch property to qmpphyEsteban Urrutia1-0/+1
USB QMP PHY is a possible handler of altmode switching, so add this property. Signed-off-by: Esteban Urrutia <esteuwu@proton.me> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-sm8450-qol-dts-v2-2-5eb2e86468c5@proton.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: sm8450: Remove unneeded reserved memory nodesEsteban Urrutia1-15/+0
These nodes are not present on downstream device trees and only take memory away from the AP. No crashes occur without these nodes, so remove them. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Esteban Urrutia <esteuwu@proton.me> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-sm8450-qol-dts-v2-1-5eb2e86468c5@proton.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: arm: qcom: Document Hawi SoC and its reference boardsMukesh Ojha1-0/+5
Add Hawi SoC and its reference boards to the Qualcomm binding. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260617151602.2018579-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali: Switch SCMI perf protocol to use power-domain-cellsMukesh Ojha1-26/+18
The SCMI protocol@13 (Performance Domain Management) node was using performance/power domain, not a clock. This was using the older mechanism for passing the SCMI performance domain index to scmi-cpufreq, which predates the #power-domain-cells support added in commit 92b2028b00ff ("cpufreq: scmi: Add support to parse domain-id using #power-domain-cells"). Switch to #power-domain-cells to match all other Qualcomm platforms (sm8750, glymur, hamoa) and align with the semantically correct representation. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260508082729.37674-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali-qrd: Add PMIC Glink nodeKrishna Kurapati1-2/+51
Add PMIC Glink node on Kaanapali QRD Platform and add remote-endpoint linkages to DWC3 controller and QMP phy respectively. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260707-kaanapali-pmic-glink-v1-2-3f7d476672d9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali-mtp: Add PMIC Glink nodeKrishna Kurapati1-2/+51
Add PMIC Glink node on Kaanapali MTP Platform and add remote-endpoint linkages to DWC3 controller and QMP phy respectively. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260707-kaanapali-pmic-glink-v1-1-3f7d476672d9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali-mtp: Add SoCCP nodeJingyi Wang1-0/+5
Add SoCCP node on Kaanapali MTP board. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260709-knp-soccp-dt-v2-3-6e2bfca96088@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali-qrd: Add SoCCP nodeJingyi Wang1-0/+5
Add SoCCP node on Kaanapali QRD board. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260709-knp-soccp-dt-v2-2-6e2bfca96088@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: kaanapali: Add SoCCP for Kaanapali SoCJingyi Wang1-0/+70
Add remoteproc PAS loader for SoCCP with its SMP2P. On Kaanapali, it is brought up by bootloader. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260709-knp-soccp-dt-v2-1-6e2bfca96088@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: milos: Add reset for sdhc_2Luca Weiss1-0/+2
Add the missing reset (BCR) for sdhc_2. Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260710-milos-sdhc2-reset-v1-1-c7a155a517ba@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: monaco-arduino-monza: add ina232 power sensorLoic Poulain1-0/+6
The Arduino Monza board has a TI INA232 current/power monitor connected on I2C12 at address 0x40. It is used to measure the board supply current through a 2 milliohms shunt resistor. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260611-monza-ina232-v2-3-e4375ce652d0@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: x1-dell-thena: mark l12b and l15b always-onMichael Scott1-0/+2
The l12b and l15b supplies are used by components that are not (fully) described (and some never will be) and must never be disabled. Mark the regulators as always-on to prevent them from being disabled, for example, when consumers probe defer or suspend. Note that these supplies currently have no consumers described in mainline for dell-thena beyond the audio codec (vdd-buck/vdd-rxtx/ vdd-io on wcd938x), which can release them when the codec goes idle. The board-level gpio-fixed regulators that feed the Type-C retimer's VDDIO and other rails are not described with a vin-supply link, so the kernel cannot keep their parent LDOs alive on its own. This mirrors the same change Johan Hovold applied to every other X1E80100 board in a March 2025 series; commit 63169c07d740 ("arm64: dts: qcom: x1e80100-dell-xps13-9345: mark l12b and l15b always-on") is representative. The dell-thena board file was introduced four months later and did not inherit that change; this patch closes the gap. Fixes: e7733b42111c ("arm64: dts: qcom: Add support for Dell Inspiron 7441 / Latitude 7455") Cc: stable@vger.kernel.org Signed-off-by: Michael Scott <mike.scott@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Val Packett <val@packett.cool> Link: https://lore.kernel.org/r/20260521010935.1333494-4-mike.scott@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: sm8250: correct frequencies in the Iris OPP tableDmitry Baryshkov1-8/+8
The OPP table for the Iris core is wrong, it copies the VDD table from the downstream kernel, but that table is written for the video_cc_mvs0_clk_src, while the upstream uses video_cc_mvs0_clk for OPP rate setting (which is clk_src divided by 3). Specify correct frequencies in the OPP table. Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node") Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-iris-venus-fix-sm8250-v7-2-7bd2f0e5bae8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: dts: qcom: sm8250: sort out Iris power domainsDmitry Baryshkov1-6/+14
On SM8250 Iris core requires two power rails to function, MX (for PLLs) and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node") added only MX power rail, but omitted MMCX voltage levels. Add MMCX domain to the Iris device node. Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node") Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-iris-venus-fix-sm8250-v7-1-7bd2f0e5bae8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15arm64: qcom: ipq5018: Add GEPHY RX and TX clocksGeorge Moussalem1-0/+3
Add RX and TX clocks for the IPQ5018 GEPHY to enable the datapath. Fixes: f5f2b835e316 ("arm64: dts: qcom: ipq5018: Add GE PHY to internal mdio bus") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20260608-ipq5018-gephy-clocks-v4-3-fb2ccd56894b@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: arm: qcom: Add Sony Xperia M2Erikas Bitovtas1-0/+1
Document the Sony Xperia M2, which is a smartphone based on the Qualcomm MSM8926 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Erikas Bitovtas <xerikasxx@gmail.com> Link: https://lore.kernel.org/r/20260610-yukon-eagle-v4-1-763d5698bd2c@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>