Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2025-05-08 | riscv: Add SiFive xsfvfwmaccqqq vendor extension | 1 | -0/+1 | |
2025-05-08 | riscv: Add SiFive xsfvfnrclipxfqf vendor extension | 1 | -0/+1 | |
2025-05-08 | riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq | 1 | -0/+19 | |
2025-05-08 | riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions | 1 | -0/+14 | |
2025-01-18 | riscv: hwprobe: Add thead vendor extension probing | 2 | -0/+56 | |
2025-01-18 | riscv: Add xtheadvector instruction definitions | 1 | -0/+25 | |
2025-01-18 | riscv: vector: Use vlenb from DT for thead | 1 | -0/+6 | |
2025-01-18 | riscv: Add thead and xtheadvector as a vendor extension | 1 | -0/+16 | |
2024-07-22 | riscv: Extend cpufeature.c to detect vendor extensions | 1 | -0/+19 |