wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2024-01-16	Merge patch series "riscv: support kernel-mode Vector"	Palmer Dabbelt	1	-0/+10
2024-01-16	riscv: lib: vectorize copy_to_user/copy_from_user	Andy Chiu	1	-0/+10
2024-01-09	use linux/export.h rather than asm-generic/export.h	Al Viro	1	-1/+1
2023-11-06	riscv: Use SYM_*() assembly macros instead of deprecated ones	Clément Léger	1	-6/+5
2023-08-16	riscv: uaccess: Return the number of bytes effectively not copied	Alexandre Ghiti	1	-4/+7
2022-08-10	riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit	Chen Lifu	1	-2/+2
2022-01-05	riscv: extable: consolidate definitions	Jisheng Zhang	1	-4/+2
2022-01-05	riscv: lib: uaccess: fold fixups into body	Jisheng Zhang	1	-11/+11
2022-01-05	riscv: switch to relative exception tables	Jisheng Zhang	1	-2/+2
2021-07-23	riscv: __asm_copy_to-from_user: Fix: Typos in comments	Akira Tsukamoto	1	-9/+9
2021-07-23	riscv: __asm_copy_to-from_user: Remove unnecessary size check	Akira Tsukamoto	1	-1/+0
2021-07-23	riscv: __asm_copy_to-from_user: Fix: fail on RV32	Akira Tsukamoto	1	-1/+1
2021-07-23	riscv: __asm_copy_to-from_user: Fix: overrun copy	Akira Tsukamoto	1	-3/+3
2021-07-06	riscv: __asm_copy_to-from_user: Optimize unaligned memory access and pipeline stall	Akira Tsukamoto	1	-35/+146
2020-03-03	RISC-V: Stop using LOCAL for the uaccess fixups	Palmer Dabbelt	1	-4/+2
2019-12-27	riscv: fix compile failure with EXPORT_SYMBOL() & !MMU	Luc Van Oostenryck	1	-0/+4
2019-11-05	riscv: abstract out CSR names for supervisor vs machine mode	Christoph Hellwig	1	-6/+6
2019-08-30	riscv: Using CSR numbers to access CSRs	Bin Meng	1	-6/+6
2018-06-11	RISC-V: Make our port sparse-clean	Palmer Dabbelt	1	-2/+4
2018-06-09	riscv: split the declaration of __copy_user	Luc Van Oostenryck	1	-2/+4
2018-06-04	riscv: Fix the bug in memory access fixup code	Alan Kao	1	-4/+9
2017-09-26	RISC-V: Generic library routines and assembly	Palmer Dabbelt	1	-0/+117