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2025-04-10x86/msr: Rename 'wrmsrl_amd_safe()' to 'wrmsrq_amd_safe()'Ingo Molnar1-2/+2
2025-04-10x86/msr: Rename 'rdmsrl_amd_safe()' to 'rdmsrq_amd_safe()'Ingo Molnar1-2/+2
2025-04-10x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()'Ingo Molnar1-6/+6
2025-04-10x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()'Ingo Molnar2-17/+17
2025-04-10x86/msr: Rename 'wrmsrl_on_cpu()' to 'wrmsrq_on_cpu()'Ingo Molnar1-1/+1
2025-04-10x86/msr: Rename 'rdmsrl_on_cpu()' to 'rdmsrq_on_cpu()'Ingo Molnar2-4/+4
2025-04-10x86/msr: Rename 'wrmsrl_safe()' to 'wrmsrq_safe()'Ingo Molnar6-15/+15
2025-04-10x86/msr: Rename 'rdmsrl_safe()' to 'rdmsrq_safe()'Ingo Molnar9-22/+22
2025-04-10x86/msr: Rename 'wrmsrl()' to 'wrmsrq()'Ingo Molnar16-67/+67
2025-04-10x86/msr: Rename 'rdmsrl()' to 'rdmsrq()'Ingo Molnar20-64/+64
2025-04-10x86/msr: Use u64 in rdmsrl_amd_safe() and wrmsrl_amd_safe()Ingo Molnar1-2/+2
2025-04-09x86/cacheinfo: Properly parse CPUID(0x80000006) L2/L3 associativityAhmed S. Darwish1-2/+8
2025-04-09x86/cacheinfo: Properly parse CPUID(0x80000005) L1d/L1i associativityAhmed S. Darwish1-3/+6
2025-04-09x86/cpu: Avoid running off the end of an AMD erratum tableDave Hansen1-0/+1
2025-04-09x86/bugs: Add RSB mitigation documentJosh Poimboeuf1-51/+13
2025-04-09x86/bugs: Don't fill RSB on context switch with eIBRSJosh Poimboeuf1-12/+12
2025-04-09x86/bugs: Don't fill RSB on VMEXIT with eIBRS+retpolineJosh Poimboeuf1-4/+4
2025-04-09x86/bugs: Fix RSB clearing in indirect_branch_prediction_barrier()Josh Poimboeuf1-1/+0
2025-04-09x86/bugs: Rename entry_ibpb() to write_ibpb()Josh Poimboeuf1-3/+3
2025-04-09x86/resctrl: Fix rdtgroup_mkdir()'s unlocked use of kernfs_node::nameJames Morse1-21/+27
2025-04-07x86/microcode/AMD: Clean the cache if update did not load microcodeBoris Ostrovsky1-0/+7
2025-04-06x86/cpuid: Add AMX and SPEC_CTRL dependenciesAndi Kleen1-0/+4
2025-04-05treewide: Switch/rename to timer_delete[_sync]()Thomas Gleixner1-3/+3
2025-04-01Merge tag 'driver-core-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-coreLinus Torvalds3-29/+63
2025-04-01Merge tag 'mm-stable-2025-03-30-16-52' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mmLinus Torvalds1-6/+5
2025-03-30Merge tag 'x86-urgent-2025-03-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-1/+1
2025-03-30Merge tag 'locking-urgent-2025-03-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-11/+24
2025-03-28x86/microcode/AMD: Fix __apply_microcode_amd()'s return valueBoris Ostrovsky1-1/+1
2025-03-25Merge tag 'crc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linuxLinus Torvalds1-0/+22
2025-03-25Merge tag 'hyperv-next-signed-20250324' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linuxLinus Torvalds1-24/+16
2025-03-25Merge tag 'ras_core_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds2-23/+22
2025-03-25Merge tag 'x86_cache_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds7-457/+481
2025-03-25Merge tag 'x86_bugs_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds2-45/+80
2025-03-25Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds2-3/+6
2025-03-25x86/cacheinfo: Apply maintainer-tip coding style fixesAhmed S. Darwish1-108/+107
2025-03-25x86/cacheinfo: Introduce cpuid_amd_hygon_has_l3_cache()Ahmed S. Darwish1-18/+14
2025-03-25x86/cacheinfo: Relocate CPUID leaf 0x4 cache_type mappingAhmed S. Darwish1-7/+8
2025-03-25x86/cacheinfo: Extract out cache self-snoop checksAhmed S. Darwish1-11/+13
2025-03-25x86/cacheinfo: Extract out cache level topology ID calculationAhmed S. Darwish1-7/+12
2025-03-25x86/cacheinfo: Separate Intel CPUID leaf 0x4 handlingAhmed S. Darwish1-55/+53
2025-03-25x86/cacheinfo: Separate CPUID leaf 0x2 handling and post-processing logicAhmed S. Darwish1-48/+58
2025-03-25x86/cpu: Use consolidated CPUID leaf 0x2 descriptor tableAhmed S. Darwish1-76/+7
2025-03-25x86/cacheinfo: Use consolidated CPUID leaf 0x2 descriptor tableAhmed S. Darwish1-106/+8
2025-03-25x86/cpu: Consolidate CPUID leaf 0x2 tablesThomas Gleixner2-1/+129
2025-03-25x86/cpu: Use enums for TLB descriptor typesAhmed S. Darwish1-25/+3
2025-03-25x86/cacheinfo: Use enums for cache descriptor typesAhmed S. Darwish1-7/+2
2025-03-25x86/cacheinfo: Clarify type markers for CPUID leaf 0x2 cache descriptorsAhmed S. Darwish1-76/+76
2025-03-25x86/cacheinfo: Rename 'struct _cpuid4_info_regs' to 'struct _cpuid4_info'Ahmed S. Darwish1-11/+11
2025-03-25x86/cacheinfo: Separate Intel and AMD CPUID leaf 0x4 code pathsAhmed S. Darwish1-41/+54
2025-03-25x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()Ahmed S. Darwish1-3/+3