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2025-04-11x86/alternatives: Introduce 'struct smp_text_poke_array' and move tp_vec and tp_vec_nr to itIngo Molnar1-20/+23
2025-04-11x86/alternatives: Assert input parameters in smp_text_poke_batch_process()Ingo Molnar1-0/+3
2025-04-11x86/alternatives: Assert that smp_text_poke_int3_handler() can only ever handle 'tp_vec[]' based requestsIngo Molnar1-4/+6
2025-04-11x86/alternatives: Simplify smp_text_poke_single() by using tp_vec and existing APIsIngo Molnar1-3/+8
2025-04-11x86/alternatives: Remove the 'addr == NULL means forced-flush' hack from smp_text_poke_batch_finish()/smp_text_poke_batch_flush()/text_poke_addr_ordered()Ingo Molnar1-8/+10
2025-04-11x86/alternatives: Use non-inverted logic instead of 'tp_order_fail()'Ingo Molnar1-7/+13
2025-04-11x86/alternatives: Add text_mutex) assert to smp_text_poke_batch_flush()Ingo Molnar1-0/+2
2025-04-11x86/alternatives: Rename 'int3_desc' to 'int3_vec'Ingo Molnar1-6/+6
2025-04-11x86/alternatives: Rename 'struct text_poke_loc' to 'struct smp_text_poke_loc'Ingo Molnar1-13/+13
2025-04-11x86/alternatives: Rename 'text_poke_loc_init()' to 'text_poke_int3_loc_init()'Ingo Molnar1-3/+3
2025-04-11x86/alternatives: Rename 'text_poke_queue()' to 'smp_text_poke_batch_add()'Ingo Molnar3-5/+5
2025-04-11x86/alternatives: Rename 'text_poke_finish()' to 'smp_text_poke_batch_finish()'Ingo Molnar3-4/+4
2025-04-11x86/alternatives: Rename 'text_poke_flush()' to 'smp_text_poke_batch_flush()'Ingo Molnar1-3/+3
2025-04-11x86/alternatives: Remove the confusing, inaccurate & unnecessary 'temp_mm_state_t' abstractionIngo Molnar1-14/+10
2025-04-11x86/alternatives: Remove duplicate 'text_poke_early()' prototypeIngo Molnar1-1/+0
2025-04-11x86/alternatives: Rename 'bp_desc' to 'int3_desc'Ingo Molnar1-6/+6
2025-04-11x86/alternatives: Rename 'poking_addr' to 'text_poke_mm_addr'Ingo Molnar1-8/+8
2025-04-11x86/alternatives: Rename 'poking_mm' to 'text_poke_mm'Ingo Molnar1-9/+9
2025-04-11x86/alternatives: Rename 'poke_int3_handler()' to 'smp_text_poke_int3_handler()'Ingo Molnar2-4/+4
2025-04-11x86/alternatives: Rename 'text_poke_bp()' to 'smp_text_poke_single()'Ingo Molnar5-9/+9
2025-04-11x86/alternatives: Rename 'text_poke_bp_batch()' to 'smp_text_poke_batch_process()'Ingo Molnar1-6/+6
2025-04-11x86/alternatives: Rename 'bp_refs' to 'text_poke_array_refs'Ingo Molnar1-7/+7
2025-04-11x86/alternatives: Rename 'struct bp_patching_desc' to 'struct text_poke_int3_vec'Ingo Molnar1-4/+4
2025-04-11x86/alternatives: Document the text_poke_bp_batch() synchronization rules a bit morePeter Zijlstra1-0/+7
2025-04-11x86/alternatives: Improve code-patching scalability by removing false sharing in poke_int3_handler()Eric Dumazet1-12/+18
2025-04-11x86/i8253: Call clockevent_i8253_disable() with interrupts disabledFernando Fernandez Mancera1-1/+2
2025-04-10x86/kexec: Invalidate GDT/IDT from relocate_kernel() instead of earlierDavid Woodhouse2-10/+9
2025-04-10x86/kexec: Add 8250 MMIO serial port outputDavid Woodhouse3-0/+42
2025-04-10x86/kexec: Add 8250 serial port outputDavid Woodhouse2-6/+39
2025-04-10x86/msr: Rename 'wrmsrl_cstar()' to 'wrmsrq_cstar()'Ingo Molnar1-3/+3
2025-04-10x86/msr: Rename 'native_wrmsrl()' to 'native_wrmsrq()'Ingo Molnar2-2/+2
2025-04-10x86/msr: Rename 'wrmsrl_amd_safe()' to 'wrmsrq_amd_safe()'Ingo Molnar1-2/+2
2025-04-10x86/msr: Rename 'rdmsrl_amd_safe()' to 'rdmsrq_amd_safe()'Ingo Molnar1-2/+2
2025-04-10x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()'Ingo Molnar1-6/+6
2025-04-10x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()'Ingo Molnar2-17/+17
2025-04-10x86/msr: Rename 'wrmsrl_on_cpu()' to 'wrmsrq_on_cpu()'Ingo Molnar1-1/+1
2025-04-10x86/msr: Rename 'rdmsrl_on_cpu()' to 'rdmsrq_on_cpu()'Ingo Molnar2-4/+4
2025-04-10x86/msr: Rename 'wrmsrl_safe_on_cpu()' to 'wrmsrq_safe_on_cpu()'Ingo Molnar1-1/+1
2025-04-10x86/msr: Rename 'rdmsrl_safe_on_cpu()' to 'rdmsrq_safe_on_cpu()'Ingo Molnar1-3/+3
2025-04-10x86/msr: Rename 'wrmsrl_safe()' to 'wrmsrq_safe()'Ingo Molnar6-15/+15
2025-04-10x86/msr: Rename 'rdmsrl_safe()' to 'rdmsrq_safe()'Ingo Molnar10-23/+23
2025-04-10x86/msr: Rename 'wrmsrl()' to 'wrmsrq()'Ingo Molnar29-129/+129
2025-04-10x86/msr: Rename 'rdmsrl()' to 'rdmsrq()'Ingo Molnar33-93/+93
2025-04-10x86/msr: Use u64 in rdmsrl_amd_safe() and wrmsrl_amd_safe()Ingo Molnar1-2/+2
2025-04-09Merge tag 'v6.15-rc1' into x86/mm, to pick up fixesIngo Molnar10-54/+87
2025-04-09Merge tag 'v6.15-rc1' into x86/asm, to refresh the branchIngo Molnar30-753/+900
2025-04-09x86/cacheinfo: Properly parse CPUID(0x80000006) L2/L3 associativityAhmed S. Darwish1-2/+8
2025-04-09x86/cacheinfo: Properly parse CPUID(0x80000005) L1d/L1i associativityAhmed S. Darwish1-3/+6
2025-04-09x86/cpu: Avoid running off the end of an AMD erratum tableDave Hansen1-0/+1
2025-04-09x86/bugs: Add RSB mitigation documentJosh Poimboeuf1-51/+13
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