| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-07-19 | clk: Explicitly include correct DT includes |   Rob Herring | 1 | -3/+0 |
| 2019-05-21 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1 |   Thomas Gleixner | 1 | -15/+1 |
| 2016-03-02 | clk: hisilicon: Remove CLK_IS_ROOT |   Stephen Boyd | 1 | -3/+3 |
| 2015-07-20 | clk: hisilicon: Remove clk.h include | Stephen Boyd | 1 | -2/+0 |
| 2014-03-19 | clk: hisi: remove static variable |   Haojian Zhuang | 1 | -2/+6 |
| 2014-03-19 | clk: hip04: add clock driver | Haojian Zhuang | 1 | -0/+54 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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