wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring	1	-1/+1
2023-05-10	clk: mediatek: Make mtk_clk_simple_remove() return void	Uwe Kleine-König	1	-3/+3
2023-03-13	clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriate	AngeloGioacchino Del Regno	1	-0/+1
2023-03-13	clk: mediatek: Add MODULE_LICENSE() where missing	AngeloGioacchino Del Regno	1	-0/+1
2023-03-13	clk: mediatek: Switch to module_platform_driver() where possible	AngeloGioacchino Del Regno	1	-2/+1
2023-03-13	clk: mediatek: Consistently use GATE_MTK() macro	AngeloGioacchino Del Regno	1	-32/+8
2023-01-30	clk: mediatek: Switch to mtk_clk_simple_probe() where possible	AngeloGioacchino Del Regno	1	-36/+18
2023-01-30	clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()	AngeloGioacchino Del Regno	1	-2/+2
2022-05-19	clk: mediatek: Replace 'struct clk' with 'struct clk_hw'	Chen-Yu Tsai	1	-2/+2
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	Thomas Gleixner	1	-9/+1
2018-03-20	clk: mediatek: add devm_of_platform_populate() for MT7622 audsys	Ryder Lee	1	-1/+13
2018-03-19	clk: mediatek: update missing clock data for MT7622 audsys	Ryder Lee	1	-0/+1
2017-11-02	clk: mediatek: add clock support for MT7622 SoC	Sean Wang	1	-0/+195