wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2024-02-21	clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF	Chen-Yu Tsai	1	-1/+1
2023-08-30	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-3/+1
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring	1	-3/+1
2023-07-19	clk: mediatek: mt8183: Add back SSPM related clocks	Chen-Yu Tsai	1	-0/+27
2023-06-26	Merge branches 'clk-platform', 'clk-i2c', 'clk-mediatek', 'clk-i2cid' and 'clk-vc5' into clk-next	Stephen Boyd	1	-10/+12
2023-06-12	clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocks	AngeloGioacchino Del Regno	1	-8/+8
2023-06-12	clk: mediatek: mux: Stop forcing CLK_SET_RATE_PARENT flag	AngeloGioacchino Del Regno	1	-2/+4
2023-05-10	clk: mediatek: Make mtk_clk_simple_remove() return void	Uwe Kleine-König	1	-1/+1
2023-03-13	clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriate	AngeloGioacchino Del Regno	1	-0/+1
2023-03-13	clk: mediatek: Add MODULE_LICENSE() where missing	AngeloGioacchino Del Regno	1	-0/+1
2023-03-13	clk: mediatek: mt8183: Convert all remaining clocks to common probe	AngeloGioacchino Del Regno	1	-132/+34
2023-03-13	clk: mediatek: mt8183: Compress clocks arrays entries where possible	AngeloGioacchino Del Regno	1	-300/+150
2023-03-13	clk: mediatek: mt8183: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	1	-153/+0
2023-01-30	clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs	AngeloGioacchino Del Regno	1	-22/+15
2023-01-30	clk: mediatek: Switch to mtk_clk_simple_probe() where possible	AngeloGioacchino Del Regno	1	-44/+31
2023-01-30	clk: mediatek: clk-mux: Propagate struct device for mtk-mux	AngeloGioacchino Del Regno	1	-2/+3
2023-01-30	clk: mediatek: clk-mtk: Propagate struct device for composites	AngeloGioacchino Del Regno	1	-6/+9
2023-01-30	clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()	AngeloGioacchino Del Regno	1	-8/+8
2022-11-29	clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors	AngeloGioacchino Del Regno	1	-38/+38
2022-11-29	clk: mediatek: mt8183: Compress top_divs array entries	AngeloGioacchino Del Regno	1	-144/+72
2022-09-29	clk: mediatek: mt8183: Add clk mux notifier for MFG mux	Chen-Yu Tsai	1	-0/+28
2022-06-15	clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195	Rex-BC Chen	1	-6/+0
2022-06-15	clk: mediatek: reset: Add new register reset function with device	Rex-BC Chen	1	-1/+1
2022-06-15	clk: mediatek: reset: Support nonsequence base offsets of reset registers	Rex-BC Chen	1	-2/+12
2022-06-15	clk: mediatek: reset: Revise structure to control reset register	Rex-BC Chen	1	-2/+7
2022-06-15	clk: mediatek: reset: Merge and revise reset register function	Rex-BC Chen	1	-1/+2
2022-05-19	clk: mediatek: Replace 'struct clk' with 'struct clk_hw'	Chen-Yu Tsai	1	-12/+13
2022-05-18	clk: mediatek: use en_mask as a pure div_en_mask	Chun-Jie Chen	1	-11/+11
2022-02-17	clk: mediatek: pll: Split definitions into separate header file	Chen-Yu Tsai	1	-1/+2
2019-10-16	clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-09-20	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-0/+44
2019-09-17	clk: mediatek: add pericfg clocks for MT8183	Chunfeng Yun	1	-0/+30
2019-08-08	clk: reset: Modify reset-controller driver	yong.liang	1	-1/+15
2019-07-22	clk: mediatek: mt8183: Register 13MHz clock earlier for clocksource	Weiyi Lu	1	-12/+34
2019-06-06	clk: mediatek: Remove MT8183 unused clock	Erin Lo	1	-19/+0
2019-04-11	clk: mediatek: Add MT8183 clock support	Weiyi Lu	1	-0/+1284