wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2024-12-02	module: Convert symbol namespace to string literal	Peter Zijlstra	1	-1/+1
2024-07-29	clk: meson: introduce symbol namespace for amlogic clocks	Jerome Brunet	1	-0/+1
2024-07-10	clk: meson: a1: peripherals: Constify struct regmap_config	Javier Carrasco	1	-1/+1
2024-06-14	clk: meson: add missing MODULE_DESCRIPTION() macros	Jerome Brunet	1	-1/+2
2024-03-29	clk: meson: a1: peripherals: determine maximum register in regmap config	Dmitry Rokosov	1	-0/+1
2023-08-30	Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next	Stephen Boyd	1	-161/+164
2023-08-08	clk: meson: a1: move bindings include to main driver	Neil Armstrong	1	-0/+2
2023-08-08	clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	1	-161/+162
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring	1	-1/+1
2023-06-12	clk: meson: a1: Staticize rtc clk	Stephen Boyd	1	-1/+1
2023-05-30	clk: meson: a1: add Amlogic A1 Peripherals clock controller driver	Dmitry Rokosov	1	-0/+2243