Age | Commit message (Expand) | Author | Files | Lines |
2020-10-20 | Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -1/+1 |
2020-10-13 | clk: meson: use semicolons rather than commas to separate statements | ![](https://seccdn.libravatar.org/avatar/63d502e8226951b49a28504376ed798b?s=13&d=retro) Julia Lawall | 1 | -1/+1 |
2020-09-10 | clk: meson: make shipped controller configurable | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -9/+17 |
2020-08-29 | clk: meson: g12a: mark fclk_div2 as critical | ![](https://seccdn.libravatar.org/avatar/e1d73347c6728cefd1c204699d59f4a5?s=13&d=retro) Stefan Agner | 1 | -0/+11 |
2020-08-17 | clk: meson: axg-audio: fix g12a tdmout sclk inverter | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -25/+60 |
2020-08-17 | clk: meson: axg-audio: separate axg and g12a regmap tables | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -8/+127 |
2020-08-17 | clk: meson: add sclk-ws driver | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 2 | -0/+62 |
2020-07-21 | Merge branch 'clk-amlogic' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 4 | -19/+178 |
2020-07-10 | Replace HTTP links with HTTPS ones: Common CLK framework | ![](https://seccdn.libravatar.org/avatar/207566c1bdec4280c808a94d3b74018f?s=13&d=retro) Alexander A. Klimov | 1 | -1/+1 |
2020-07-09 | clk: meson: meson8b: add the vclk2_en gate clock | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 2 | -6/+27 |
2020-07-09 | clk: meson: meson8b: add the vclk_en gate clock | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 2 | -6/+27 |
2020-06-24 | clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -7/+0 |
2020-06-19 | clk: meson: g12a: Add support for NNA CLK source clocks | ![](https://seccdn.libravatar.org/avatar/7914149afc34a6535ced953ea7e8be24?s=13&d=retro) Dmitry Shmidt | 2 | -1/+125 |
2020-05-02 | clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 2 | -0/+13 |
2020-04-29 | clk: meson: meson8b: Make the CCF use the glitch-free VPU mux | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -3/+11 |
2020-04-29 | clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -5/+5 |
2020-04-29 | clk: meson: meson8b: Fix the polarity of the RESET_N lines | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -23/+56 |
2020-04-29 | clk: meson: meson8b: Fix the first parent of vid_pll_in_sel | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -1/+1 |
2020-04-16 | clk: meson: g12a: Prepare the GPU clock tree to change at runtime | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -8/+22 |
2020-04-16 | clk: meson: gxbb: Prepare the GPU clock tree to change at runtime | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -18/+22 |
2020-04-14 | clk: meson: meson8b: make the hdmi_sys clock tree mutable | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -3/+3 |
2020-04-14 | clk: meson8b: export the HDMI system clock | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -1/+0 |
2020-02-21 | clk: meson: meson8b: set audio output clock hierarchy | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -8/+13 |
2020-02-19 | clk: meson: g12a: add support for the SPICC SCLK Source clocks | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 2 | -1/+134 |
2020-02-13 | clk: meson: gxbb: set audio output clock hierarchy | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -8/+10 |
2020-02-13 | clk: meson: gxbb: add the gxl internal dac gate | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 2 | -1/+4 |
2020-01-31 | Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlogic' and 'clk-allwinner' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 5 | -56/+229 |
2020-01-07 | clk: meson: meson8b: make the CCF use the glitch-free mali mux | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -4/+7 |
2019-12-23 | clk: let init callback return an error code | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 4 | -4/+12 |
2019-12-16 | Merge branch 'v5.5/fixes' into v5.6/drivers | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 2 | -0/+10 |
2019-12-16 | clk: meson: pll: Fix by 0 division in __pll_params_to_rate() | ![](https://seccdn.libravatar.org/avatar/c678842a66081198fb0c35b0cde5e321?s=13&d=retro) Remi Pommarel | 1 | -0/+9 |
2019-12-16 | clk: meson: g12a: fix missing uart2 in regmap table | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -0/+1 |
2019-12-11 | clk: meson: meson8b: use of_clk_hw_register to register the clocks | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -1/+1 |
2019-12-11 | clk: meson: meson8b: don't register the XTAL clock when provided via OF | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -3/+9 |
2019-12-11 | clk: meson: meson8b: change references to the XTAL clock to use [fw_]name | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -34/+44 |
2019-12-11 | clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -13/+8 |
2019-12-11 | clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 2 | -1/+150 |
2019-10-14 | clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code | ![](https://seccdn.libravatar.org/avatar/99fadc7a66f85bd5c0262cb31d311d89?s=13&d=retro) YueHaibing | 1 | -3/+1 |
2019-10-08 | clk: meson: axg_audio: add sm1 support | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 2 | -30/+574 |
2019-10-08 | clk: meson: axg-audio: provide clk top signal name | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 2 | -4/+17 |
2019-10-08 | clk: meson: axg-audio: prepare sm1 addition | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -685/+782 |
2019-10-08 | clk: meson: axg-audio: fix regmap last register | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -1/+1 |
2019-10-08 | clk: meson: axg-audio: remove useless defines | ![](https://seccdn.libravatar.org/avatar/71316ce9f400d3fd48abc4610d61c68c?s=13&d=retro) Jerome Brunet | 1 | -4/+0 |
2019-10-01 | clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 1 | -0/+9 |
2019-10-01 | clk: meson: g12a: fix cpu clock rate setting | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 1 | -2/+2 |
2019-10-01 | clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate | ![](https://seccdn.libravatar.org/avatar/9251462cf8ce43d9c14fb3aa79e41b26?s=13&d=retro) Martin Blumenstingl | 1 | -0/+1 |
2019-09-19 | Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -2/+5 |
2019-08-26 | clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 2 | -1/+61 |
2019-08-26 | clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 2 | -1/+198 |
2019-08-26 | clk: meson: g12a: add support for SM1 GP1 PLL | ![](https://seccdn.libravatar.org/avatar/16c7426560c7ea13e689d1410981f0d1?s=13&d=retro) Neil Armstrong | 2 | -1/+310 |