| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-01-24 | clk: renesas: r8a779g0: Add custom clock for PLL2 |   Geert Uytterhoeven | 1 | -0/+156 |
| 2022-07-05 | clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config |   Andi Kleen | 1 | -1/+1 |
| 2022-04-29 | clk: renesas: rcar-gen4: Add CLK_TYPE_GEN4_PLL4 |   Yoshihiro Shimoda | 1 | -0/+5 |
| 2021-12-08 | clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver | Yoshihiro Shimoda | 1 | -0/+305 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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