wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-03-21	clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling	Marco Pagani	1	-7/+19
2022-12-07	clk: socfpga: remove the setting of clk-phase for sdmmc_clk	Dinh Nguyen	1	-68/+0
2021-04-07	clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return	Colin Ian King	1	-0/+1
2021-03-30	clk: socfpga: arria10: convert to use clk_hw	Dinh Nguyen	1	-4/+4
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	Thomas Gleixner	1	-12/+1
2017-06-19	clk: socfpga: Fix the smplsel on Arria10 and Stratix10	Dinh Nguyen	1	-1/+1
2016-02-22	clk: socfpga: allow for multiple parents on Arria10 periph clocks	Dinh Nguyen	1	-5/+1
2015-07-28	clk: socfpga: switch to GENMASK()	Andy Shevchenko	1	-1/+1
2015-07-20	clk: socfpga: Remove clk.h and clkdev.h includes	Stephen Boyd	1	-0/+1
2015-06-09	clk: socfpga: remove a stray tab	Dan Carpenter	1	-1/+1
2015-05-21	clk: socfpga: add a clock driver for the Arria 10 platform	Dinh Nguyen	1	-0/+190