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path: root/drivers/clk/socfpga/clk-pll-s10.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2020-02-12clk: socfpga: stratix10: simplify parameter passingDinh Nguyen1-6/+7
2020-02-12clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen1-1/+3
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2019-01-11clk: socfpga: stratix10: fix rate calculation for pll clocksDinh Nguyen1-1/+1
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen1-0/+146