| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-10-08 | drivers: clk: st: PLL rate change implementation for DVFS |   Gabriel Fernandez | 1 | -0/+2 |
| 2014-03-25 | clk: st: Support for PLLs inside ClockGenA(s) |   Gabriel FERNANDEZ | 1 | -0/+48 |
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index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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