wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2025-01-14	clk: starfive: Make _clk_get become a common helper function	Changhuang Liang	8	-73/+27
2024-10-30	clk: starfive: jh7110-pll: Mark the probe function as __init	Changhuang Liang	1	-1/+1
2024-09-23	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	2	-3/+3
2024-09-21	clk: Switch back to struct platform_driver::remove()	Uwe Kleine-König	2	-2/+2
2024-08-29	clk: starfive: jh7110-sys: Add notifier for PLL0 clock	Xingyu Wu	2	-1/+32
2024-08-28	clk: starfive: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage	Yuntao Liu	1	-1/+1
2024-03-08	clk: starfive: jh7110-vout: Convert to platform remove callback returning void	Uwe Kleine-König	1	-4/+2
2024-03-08	clk: starfive: jh7110-isp: Convert to platform remove callback returning void	Uwe Kleine-König	1	-4/+2
2024-01-03	clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx	Emil Renner Berthing	1	-1/+1
2024-01-03	clk: starfive: Add flags argument to JH71X0__MUX macro	Emil Renner Berthing	6	-36/+36
2023-08-30	Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next	Stephen Boyd	10	-31/+1240
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring	1	-1/+0
2023-07-19	clk: starfive: Simplify .determine_rate()	Christophe JAILLET	1	-8/+2
2023-07-19	clk: starfive: Add StarFive JH7110 Video-Output clock driver	Xingyu Wu	3	-0/+248
2023-07-19	clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver	Xingyu Wu	4	-0/+247
2023-07-19	clk: starfive: Add StarFive JH7110 System-Top-Group clock driver	Emil Renner Berthing	3	-0/+182
2023-07-19	clk: starfive: jh7110-sys: Add PLL clocks source from DTS	Xingyu Wu	2	-22/+45
2023-07-19	clk: starfive: Add StarFive JH7110 PLL clock driver	Xingyu Wu	3	-0/+516
2023-05-02	clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case	Hal Feng	1	-4/+1
2023-04-17	clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers	Hal Feng	2	-4/+0
2023-04-13	clk: starfive: Avoid casting iomem pointers	Stephen Boyd	1	-3/+12
2023-04-05	clk: starfive: Add StarFive JH7110 always-on clock driver	Emil Renner Berthing	3	-0/+168
2023-04-05	clk: starfive: Add StarFive JH7110 system clock driver	Emil Renner Berthing	4	-0/+514
2023-04-05	clk: starfive: Rename "jh7100" to "jh71x0" for the common code	Emil Renner Berthing	4	-406/+418
2023-04-05	clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h	Emil Renner Berthing	4	-3/+3
2023-04-05	clk: starfive: Factor out common JH7100 and JH7110 code	Emil Renner Berthing	5	-326/+342
2023-04-05	clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE	Hal Feng	1	-3/+3
2022-03-10	clk: starfive: Add JH7100 audio clock driver	Emil Renner Berthing	3	-0/+179
2022-03-10	clk: starfive: jh7100: Support more clock types	Emil Renner Berthing	2	-0/+41
2022-03-10	clk: starfive: jh7100: Make hw clock implementation reusable	Emil Renner Berthing	2	-89/+104
2022-03-10	clk: starfive: jh7100: Handle audio_div clock properly	Emil Renner Berthing	1	-1/+67
2022-03-10	clk: starfive: jh7100: Don't round divisor up twice	Emil Renner Berthing	1	-11/+3
2021-12-16	clk: starfive: Add JH7100 clock generator driver	Geert Uytterhoeven	3	-0/+701