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gregkh/stable-5.4.y
jd/deferred-aip-removal
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WireGuard for the Linux kernel
Jason A. Donenfeld
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path:
root
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drivers
/
clk
/
tegra
/
clk-tegra-super-gen4.c
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Author
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2019-11-11
clk: tegra: clk-super: Fix to enable PLLP branches to CPU
Sowjanya Komatineni
1
-1
/
+6
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
Thomas Gleixner
1
-12
/
+1
2018-03-12
clk: tegra: Mark HCLK, SCLK and EMC as critical
Dmitry Osipenko
1
-3
/
+5
2017-11-01
clk: tegra: Mark APB clock as critical
Jon Hunter
1
-1
/
+1
2017-08-23
clk: tegra: Re-factor T210 PLLX registration
Alex Frid
1
-2
/
+9
2016-02-02
clk: tegra: super: Fix sparse warnings for functions not declared as static
Jon Hunter
1
-3
/
+3
2015-12-17
clk: tegra: Add Super Gen5 Logic
Bill Huang
1
-13
/
+129
2015-08-25
Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Stephen Boyd
1
-1
/
+3
2015-07-20
clk: tegra: Properly include clk.h
Stephen Boyd
1
-1
/
+0
2015-07-16
clk: tegra: Add the DFLL as a possible parent of the cclk_g clock
Tuomas Tynkkynen
1
-1
/
+3
2014-02-17
clk: tegra: cclk_lp has a pllx/2 divider
Andrew Bresticker
1
-1
/
+1
2013-11-26
clk: tegra: introduce common gen4 super clock
Peter De Schrijver
1
-0
/
+149