| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2020-01-04 | clk: uniphier: Add SCSSI clock gate for each channel |   Kunihiko Hayashi | 1 | -5/+8 |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 |   Thomas Gleixner | 1 | -10/+1 |
| 2018-07-25 | clk: uniphier: add clock frequency support for SPI | Kunihiko Hayashi | 1 | -0/+9 |
| 2016-09-16 | clk: uniphier: add clock data for UniPhier SoCs |   Masahiro Yamada | 1 | -0/+57 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
| aboutsummaryrefslogtreecommitdiffstatshomepage |