| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-10-17 | clk: mxl: Switch from direct readl/writel based IO to regmap based IO |   Rahul Tanwar | 1 | -2/+3 |
| 2020-05-26 | clk: intel: Add CGU clock driver for a new SoC |   Rahul Tanwar | 1 | -0/+8 |
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index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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