wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-12-16	drivers: clk: zynqmp: update divider round rate logic	Jay Buddhabhatti	1	-61/+5
2022-08-22	clk: zynqmp: Add a check for NULL pointer	Shubhrajyoti Datta	1	-2/+5
2022-08-22	clk: zynqmp: make bestdiv unsigned	Shubhrajyoti Datta	1	-1/+1
2022-01-24	clk: zynqmp: replace warn_once with pr_debug for failed clock ops	Michael Tretter	1	-6/+6
2021-06-28	clk: zynqmp: Handle divider specific read only flag	Rajan Vaja	1	-1/+9
2021-06-28	clk: zynqmp: Use firmware specific divider clock flags	Rajan Vaja	1	-1/+24
2021-06-28	clk: zynqmp: Use firmware specific common clock flags	Rajan Vaja	1	-2/+3
2021-02-11	clk: zynqmp: divider: Add missing description for 'max_div'	Lee Jones	1	-0/+1
2020-06-10	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-8/+19
2020-05-26	clk: zynqmp: Make zynqmp_clk_get_max_divisor static	YueHaibing	1	-1/+1
2020-05-26	clk: zynqmp: Update fraction clock check from custom type flags	Tejas Patel	1	-2/+4
2020-05-26	clk: zynqmp: Fix divider2 calculation	Tejas Patel	1	-5/+12
2020-05-26	clk: zynqmp: Limit bestdiv with maxdiv	Rajan Vaja	1	-0/+2
2020-04-28	firmware: xilinx: Remove eemi ops for clock_getdivider	Rajan Vaja	1	-4/+2
2020-04-28	firmware: xilinx: Remove eemi ops for clock_setdivider	Rajan Vaja	1	-2/+1
2020-04-28	firmware: xilinx: Remove eemi ops for query_data	Rajan Vaja	1	-2/+1
2020-01-23	clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag	Tejas Patel	1	-5/+31
2020-01-23	clk: zynqmp: Fix divider calculation	Rajan Vaja	1	-0/+46
2020-01-23	clk: zynqmp: Add support for get max divider	Rajan Vaja	1	-0/+36
2019-04-11	clk: zynqmp: fix check for fractional clock	Michael Tretter	1	-3/+6
2019-04-11	clk: zynqmp: do not export zynqmp_clk_register_* functions	Michael Tretter	1	-1/+0
2019-04-11	drivers: clk: zynqmp: Allow zero divisor value	Rajan Vaja	1	-0/+7
2018-10-09	drivers: clk: Add ZynqMP clock driver	Jolly Shah	1	-0/+217