wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2026-01-19	clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src	David Heidelberg	1	-1/+1
2026-01-19	clk: qcom: dispcc-sdm845: Enable parents for pixel clocks	Petr Hodina	1	-2/+2
2026-01-17	clk: imx: fracn-gppll: Add 241.90 MHz Support	Marco Felsch	1	-1/+2
2026-01-17	clk: imx: fracn-gppll: Add 332.60 MHz Support	Marco Felsch	1	-0/+1
2026-01-17	clk: samsung: gs101: add support for Display Process Unit (DPU) clocks	Peter Griffin	1	-0/+283
2026-01-17	clk: samsung: fix sysreg save/restore when PM is enabled for CMU	André Draszik	3	-13/+41
2026-01-17	clk: samsung: avoid warning message on legacy Exynos (auto clock gating)	André Draszik	1	-1/+1
2026-01-17	clk: tegra30: Add CSI pad clock gates	Svyatoslav Ryhel	1	-1/+12
2026-01-17	clk: tegra: Set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114	Svyatoslav Ryhel	3	-9/+25
2026-01-17	clk: tegra20: Reparent dsi clock to pll_d_out0	Svyatoslav Ryhel	1	-3/+3
2026-01-17	clk: tegra: tegra124-emc: Simplify with scoped for each OF child loop	Krzysztof Kozlowski	1	-3/+1
2026-01-17	clk: tegra: Adjust callbacks in tegra_clock_pm	Rafael J. Wysocki	1	-1/+12
2026-01-16	clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate()	Brian Masney	1	-6/+2
2026-01-16	clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate()	Brian Masney	1	-6/+2
2026-01-16	clk: tegra: tegra124-emc: Fix potential memory leak in tegra124_clk_register_emc()	Haoxiang Li	1	-1/+3
2026-01-16	clk: renesas: Add missing log message terminators	Geert Uytterhoeven	4	-9/+9
2026-01-16	clk: renesas: rzg2l: Remove DSI clock rate restrictions	Chris Brandt	1	-31/+143
2026-01-16	clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE	Conor Dooley	1	-2/+2
2026-01-15	clk: clk-apple-nco: Add "apple,t8103-nco" compatible	Janne Grunau	1	-0/+1
2026-01-15	clk: versatile: impd1: Simplify with scoped for each OF child loop	Krzysztof Kozlowski	1	-5/+2
2026-01-15	clk: scpi: Simplify with scoped for each OF child loop	Krzysztof Kozlowski	1	-3/+2
2026-01-15	clk: lmk04832: Simplify with scoped for each OF child loop	Krzysztof Kozlowski	1	-3/+1
2026-01-14	clk: thead: th1520-ap: Support CPU frequency scaling	Yao Zi	1	-2/+146
2026-01-13	clk: clk-bd718x7: Support BD72720 clk gate	Matti Vaittinen	2	-4/+10
2026-01-10	clk: microchip: core: remove unused include asm/traps.h	Brian Masney	1	-1/+0
2026-01-10	clk: microchip: core: correct return value on *_get_parent()	Brian Masney	1	-13/+12
2026-01-10	clk: microchip: core: remove duplicate determine_rate on pic32_sclk_ops	Brian Masney	1	-10/+0
2026-01-09	clk: rockchip: Fix error pointer check after rockchip_clk_register_gate_link()	Miaoqian Lin	1	-1/+1
2026-01-09	clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate()	Brian Masney	1	-15/+6
2026-01-09	clk: renesas: rzv2h: Deassert reset on assert timeout	Biju Das	1	-4/+5
2026-01-09	clk: renesas: rzg2l: Deassert reset on assert timeout	Biju Das	1	-4/+5
2026-01-09	clk: renesas: cpg-mssr: Unlock before reset verification	Lad Prabhakar	1	-3/+3
2026-01-09	clk: renesas: r9a09g056: Add entries for CANFD	Lad Prabhakar	1	-0/+10
2026-01-09	clk: renesas: r9a09g057: Add entries for CANFD	Lad Prabhakar	1	-0/+10
2026-01-09	clk: renesas: r9a09g077: Add CANFD clocks	Lad Prabhakar	1	-1/+12
2026-01-09	clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks	Cosmin Tanislav	1	-5/+21
2026-01-09	clk: spacemit: k3: add the clock tree	Yixun Lan	3	-0/+1496
2026-01-09	clk: spacemit: ccu_pll: add plla type clock	Yixun Lan	3	-10/+166
2026-01-09	clk: spacemit: ccu_mix: add inverted enable gate clock	Yixun Lan	2	-4/+20
2026-01-09	clk: spacemit: add platform SoC prefix to reset name	Yixun Lan	1	-6/+6
2026-01-09	clk: spacemit: extract common ccu functions	Yixun Lan	3	-174/+186
2026-01-08	clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read()	Cosmin Tanislav	1	-14/+6
2026-01-07	clk: qcom: Add support for GPUCC and GXCLK for Kaanapali	Taniya Das	4	-0/+568
2026-01-07	clk: qcom: Add support for VideoCC driver for Kaanapali	Taniya Das	3	-0/+831
2026-01-07	clk: qcom: camcc: Add support for camera clock controller for Kaanapali	Taniya Das	4	-0/+3109
2026-01-07	clk: qcom: dispcc: Add support for display clock controller Kaanapali	Taniya Das	3	-0/+1967
2026-01-07	clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL	Taniya Das	1	-0/+2
2026-01-07	clk: qcom: clk-alpha-pll: Update the PLL support for cal_l	Taniya Das	2	-1/+6
2026-01-07	clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC	Taniya Das	4	-0/+3175
2026-01-07	clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL	Taniya Das	2	-0/+18