wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2026-05-12	clk: scmi: Use new simplified per-clock rate properties	Cristian Marussi	1	-15/+2
2026-05-12	clk: scmi: Use new determine_rate clock operation	Cristian Marussi	1	-25/+6
2026-05-12	clk: scmi: Fix clock rate rounding	Cristian Marussi	1	-2/+2
2026-05-11	clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC	Kathiravan Thirumoorthy	3	-0/+3456
2026-05-11	clk: renesas: r9a08g046: Add RSPI clocks and resets	Biju Das	1	-0/+49
2026-05-11	clk: renesas: r9a08g046: Add SSIF-2 clocks and resets	Biju Das	1	-0/+20
2026-05-11	clk: renesas: r9a08g046: Add RSCI clocks and resets	Biju Das	1	-0/+71
2026-05-09	clk: qcom: Constify qcom_cc_driver_data and list of critical CBCR registers	Krzysztof Kozlowski	5	-7/+7
2026-05-09	clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap	Krzysztof Kozlowski	1	-1/+1
2026-05-09	clk: qcom: x1e80100-dispcc: Stop disp_cc_mdss_mdp_clk_src from getting parked	Hans de Goede	1	-1/+1
2026-05-07	clk: renesas: cpg-mssr: Add number of clock cells check	Geert Uytterhoeven	1	-0/+3
2026-05-07	clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable()	Geert Uytterhoeven	1	-9/+7
2026-05-07	clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS()	Geert Uytterhoeven	1	-8/+5
2026-05-07	clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks	Biju Das	1	-0/+1
2026-05-05	clk: microchip: rename clk-core to clk-pic32	Conor Dooley	4	-3/+3
2026-05-04	Merge tag 'clk-renesas-rzg3e-plldsi-tag' into renesas-clk-for-v7.2	Geert Uytterhoeven	3	-0/+277
2026-05-04	clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: r9a09g047: Add support for DSI clocks and resets	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK	Tommaso Merciai	2	-0/+11
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks	Tommaso Merciai	2	-0/+19
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_DIV7 clocks	Tommaso Merciai	1	-0/+5
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1} clocks	Tommaso Merciai	1	-0/+11
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLETH_LPCLK support	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: rzv2h: Add PLLDSI clk mux support	Tommaso Merciai	2	-0/+189
2026-04-28	clk: rk808: fix OF node reference imbalance	Johan Hovold	1	-1/+1
2026-04-28	clk: hisilicon: Improve deallocation in error path	J. Neuschäfer	1	-1/+3
2026-04-28	clk-lpc18xx-ccu: kzalloc + kcalloc to kzalloc_flex	Rosen Penev	1	-9/+5
2026-04-28	clk: clk-axi-clkgen: Add support versal timings	Nuno Sá	1	-1/+4
2026-04-28	clk: mmp: pxa1908-apbcp: Add reset cells	Duje Mihanović	1	-3/+28
2026-04-28	clk: mmp: pxa1908-apbc: Add reset cells	Duje Mihanović	1	-14/+44
2026-04-28	clk: mediatek: mt7988: use MUX_CLR_SET for gate-less muxes	Daniel Golle	1	-42/+38
2026-04-28	clk: mediatek: mt8192: use MUX_CLR_SET	Daniel Golle	1	-2/+2
2026-04-28	clk: mediatek: add MUX_CLR_SET macro	Daniel Golle	1	-0/+5
2026-04-28	clk: eyeq: add EyeQ5 children auxiliary device for generic PHYs	Théo Lebrun	1	-0/+3
2026-04-28	clk: eyeq: use the auxiliary device creation helper	Jerome Brunet	1	-45/+12
2026-04-28	clk: spacemit: k3: mark top_dclk as CLK_IS_CRITICAL	Troy Mitchell	1	-1/+1
2026-04-28	clk: bulk: Use dev_err_probe() helper in of_clk_bulk_get()	Alexander Stein	1	-6/+8
2026-04-28	clk: bcm: iproc-asiu: simplify allocation	Rosen Penev	1	-17/+10
2026-04-28	clk: clk-max77686: kzalloc + kcalloc to kzalloc	Rosen Penev	1	-19/+13
2026-04-28	clk: visconti: pll: use kzalloc_flex	Rosen Penev	1	-10/+7
2026-04-28	clk: hisilicon: clkdivider-hi6220: use kzalloc_flex	Rosen Penev	1	-17/+9
2026-04-28	clk: mvebu: use kzalloc_flex	Rosen Penev	1	-13/+8
2026-04-27	clk: qcom: Add support for GXCLK for Milos	Luca Weiss	2	-1/+2
2026-04-27	clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO	Daniele Briguglio	1	-0/+16
2026-04-27	clk: rockchip: add helper to register auxiliary GRFs	Daniele Briguglio	2	-0/+21
2026-04-27	clk: rockchip: allow grf_type_sys lookup in aux_grf_table	Daniele Briguglio	1	-4/+3
2026-04-27	clk: renesas: r8a7740: Add ZT/ZTR trace clocks	Marek Vasut	1	-0/+2
2026-04-27	clk: renesas: r9a09g077: Add MTU3 module clock	Cosmin Tanislav	1	-0/+1
2026-04-27	clk: renesas: r9a08g046: Add I2C clocks and resets	Biju Das	1	-0/+12
2026-04-27	clk: renesas: r9a08g046: Add SCIF{1..5} clocks and resets	Biju Das	1	-0/+15