aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2025-05-06clk: qcom: gpucc-sm6350: Add *_wait_val values for GDSCsLuca Weiss1-0/+6
2025-05-06clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCsLuca Weiss1-0/+6
2025-05-06clk: qcom: dispcc-sm6350: Add *_wait_val values for GDSCsLuca Weiss1-0/+3
2025-05-06clk: qcom: camcc-sm6350: Add *_wait_val values for GDSCsLuca Weiss1-0/+18
2025-05-05clk: rockchip: add GATE_GRFs for SAI MCLKOUT to rk3576Nicolas Frattaroli1-0/+27
2025-05-05clk: rockchip: introduce GRF gatesNicolas Frattaroli4-1/+134
2025-05-05clk: rockchip: introduce auxiliary GRFsNicolas Frattaroli7-18/+72
2025-05-05clk: renesas: Use str_on_off() helperGeert Uytterhoeven2-2/+4
2025-05-01clk: sunxi-ng: fix order of arguments in clock macroAndre Przywara1-2/+1
2025-04-30clk: samsung: exynosautov920: Fix incorrect CLKS_NR_CPUCL0 definitionShin Son1-1/+1
2025-04-30clk: samsung: exynosautov920: add cpucl1/2 clock supportShin Son1-0/+206
2025-04-27clk: samsung: exynosautov920: add cpucl0 clock supportShin Son1-0/+130
2025-04-27clk: sunxi: Do not enable by default during compile testingKrzysztof Kozlowski1-5/+5
2025-04-27clk: sunxi-ng: Do not enable by default during compile testingKrzysztof Kozlowski1-24/+24
2025-04-26clk: rockchip: rk3568: Add PLL rate for 33.3MHzVasily Khoruzhick1-0/+1
2025-04-26clk: rockchip: rk3576: define clk_otp_phy_gHeiko Stuebner1-0/+2
2025-04-24clk: socfpga: stratix10: Optimize local variablesThorsten Blum1-3/+3
2025-04-24clk: socfpga: clk-pll: Optimize local variablesThorsten Blum1-2/+2
2025-04-22clk: renesas: r9a09g057: Add clock and reset entries for USB2Lad Prabhakar1-1/+19
2025-04-22clk: renesas: rzv2h: Use both CLK_ON and CLK_MON bits for clock state validationLad Prabhakar1-3/+6
2025-04-22clk: renesas: rzv2h: Use str_on_off() helper in rzv2h_mod_clock_endisable()Lad Prabhakar1-1/+2
2025-04-22clk: renesas: rzv2h: Support static dividers without RMWBiju Das2-1/+16
2025-04-22clk: renesas: rzv2h: Add macro for defining static dividersLad Prabhakar2-0/+13
2025-04-22clk: renesas: rzv2h: Add support for static mux clocksLad Prabhakar2-0/+53
2025-04-22clk: renesas: r9a09g047: Add clock and reset entries for GE3DTommaso Merciai1-0/+11
2025-04-22clk: renesas: rzv2h: Fix a typoBiju Das1-1/+1
2025-04-17clk: spacemit: k1: Add TWSI8 bus and function clocksHaylen Chu1-0/+10
2025-04-17clk: spacemit: Add clock support for SpacemiT K1 SoCHaylen Chu12-0/+2087
2025-04-16clk: samsung: Use samsung CCF common functionVarada Pavani1-32/+42
2025-04-15clk: qcom: Fix missing error check for dev_pm_domain_attach()Wentao Liang1-1/+5
2025-04-14clk: renesas: rzv2h: Add support for RZ/V2N SoCLad Prabhakar5-0/+165
2025-04-14clk: renesas: rzv2h: Sort compatible list based on SoC part numberLad Prabhakar1-6/+6
2025-04-14clk: renesas: rzv2h: Simplify rzv2h_cpg_assert()/rzv2h_cpg_deassert()Tommaso Merciai1-19/+15
2025-04-14clk: renesas: rzv2h: Improve rzv2h_ddiv_set_rate()Tommaso Merciai1-6/+0
2025-04-10clk: rockchip: Drop empty init callback for rk3588 PLL typeYao Zi1-11/+0
2025-04-10clk: rockchip: rk3588: Add PLL rate for 1500 MHzAlexander Shiyan1-0/+1
2025-04-08clk: renesas: r9a09g057: Add clock and reset entries for GE3DLad Prabhakar2-0/+16
2025-04-08clk: renesas: rzv2h: Rename PLL field macros for consistencyLad Prabhakar1-7/+7
2025-04-08clk: renesas: rzv2h: Add support for enabling PLLsLad Prabhakar1-0/+56
2025-04-08clk: renesas: rzv2h: Remove unused `type` field from `struct pll_clk`Lad Prabhakar1-2/+0
2025-04-08clk: renesas: rzv2h: Refactor PLL configuration handlingLad Prabhakar4-15/+32
2025-04-03Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linuxLinus Torvalds1-5/+4
2025-03-29Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds167-577/+15173
2025-03-26Merge branches 'clk-allwinner', 'clk-amlogic' and 'clk-qcom' into clk-nextStephen Boyd94-230/+5644
2025-03-26Merge branches 'clk-rockchip', 'clk-samsung' and 'clk-imx' into clk-nextStephen Boyd44-38/+9157
2025-03-26Merge branches 'clk-parent', 'clk-renesas', 'clk-mediatek' and 'clk-cleanup' into clk-nextStephen Boyd29-309/+368
2025-03-26ARM: 9445/1: clkdev: Mark some functions with __printf() attributeAndy Shevchenko1-5/+4
2025-03-17clk: qcom: Add NSS clock Controller driver for IPQ9574Devi Priya3-0/+3118
2025-03-17clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clockDevi Priya1-0/+15
2025-03-16clk: qcom: gcc-msm8953: fix stuck venus0_core0 clockVladimir Lypak1-1/+1