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path: root/drivers/cxl/cxl.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2025-04-09cxl/pci: Drop the parameter is_port of cxl_gpf_get_dvsec()Li Ming1-1/+1
2025-04-09cxl/core: Fix caching dport GPF DVSEC issueLi Ming1-2/+2
2025-03-14Merge branch 'for-6.15/extended-linear-cache' into cxl-for-next2Dave Jiang1-0/+8
2025-03-14Merge branch 'for-6.15/dirty-shutdown' into cxl-for-next2Dave Jiang1-0/+5
2025-03-14cxl/pmem: Export dirty shutdown count via sysfsDavidlohr Bueso1-0/+1
2025-03-14cxl/pci: Introduce cxl_gpf_get_dvsec()Davidlohr Bueso1-0/+2
2025-03-14cxl/pci: Support Global Persistent Flush (GPF)Davidlohr Bueso1-0/+2
2025-02-26cxl: Add mce notifier to emit aliased address for extended linear cacheDave Jiang1-0/+6
2025-02-26acpi/hmat / cxl: Add extended linear cache support for CXLDave Jiang1-0/+2
2025-02-04cxl: Kill enum cxl_decoder_modeDan Williams1-28/+9
2025-02-04cxl: Remove the CXL_DECODER_MIXED mistakeDan Williams1-3/+1
2025-01-29Merge tag 'cxl-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-2/+4
2025-01-22cxl/core/regs: Refactor out functions to count regblocks of given typeHuaisheng Ye1-1/+2
2025-01-03cxl/pmem: Remove is_cxl_nvdimm_bridge()Zijun Hu1-1/+0
2025-01-02cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()Alejandro Lucero1-1/+2
2024-11-22Merge tag 'cxl-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-0/+9
2024-10-28cxl/core/regs: Add rcd_pcie_cap initializationKobayashi,Daisuke1-0/+9
2024-10-25cxl/port: Fix use-after-free, permit out-of-order decoder shutdownDan Williams1-1/+2
2024-09-22cxl: Calculate region bandwidth of targets with shared upstream linkDave Jiang1-0/+1
2024-09-09cxl/pci: Remove duplicated implementation of waiting for memory_info_validYanfei Xu1-1/+1
2024-09-03cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()Li Ming1-2/+3
2024-09-03cxl/port: Use __free() to drop put_device() for cxl_portLi Ming1-0/+1
2024-07-28Merge tag 'cxl-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-7/+6
2024-07-25Merge tag 'driver-core-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-coreLinus Torvalds1-4/+1
2024-07-11Merge branch 'for-6.11/xor_fixes' into cxl-for-nextDave Jiang1-7/+4
2024-07-11cxl: Remove defunct code calculating host bridge target positionsAlison Schofield1-7/+1
2024-07-11cxl: Restore XOR'd position bits during address translationAlison Schofield1-0/+3
2024-07-03driver core: have match() callback in struct bus_type take a const *Greg Kroah-Hartman1-4/+1
2024-07-02cxl/region: Support to calculate memory tier abstract distanceHuang Ying1-0/+2
2024-06-25cxl/region: check interleave capabilityYao Xingtao1-0/+2
2024-06-18cxl/mem: Fix no cxl_nvd during pmem region auto-assemblingLi Ming1-2/+2
2024-05-21Merge tag 'pci-v6.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pciLinus Torvalds1-0/+2
2024-05-08cxl: Add post-reset warning if reset results in loss of previously committed HDM decodersDave Jiang1-0/+2
2024-05-01cxl/acpi: Cleanup __cxl_parse_cfmws()Dan Williams1-0/+5
2024-04-30cxl: Fix compile warning for cxl_security_ops externDave Jiang1-0/+2
2024-04-08cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coordDave Jiang1-4/+2
2024-04-08cxl: Fix incorrect region perf data calculationDave Jiang1-2/+0
2024-03-12cxl/region: Add memory hotplug notifier for cxl regionDave Jiang1-0/+3
2024-03-12cxl/region: Calculate performance data for a regionDave Jiang1-0/+4
2024-03-12cxl: Split out host bridge access coordinatesDave Jiang1-0/+2
2024-03-12cxl: Split out combine_coordinates() for common shared usageDave Jiang1-0/+4
2024-03-12ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access classesDave Jiang1-1/+1
2024-02-16cxl: Fix sysfs export of qos_class for memdevDave Jiang1-0/+2
2024-01-05Merge branch 'for-6.7/cxl' into for-6.8/cxlDan Williams1-2/+0
2024-01-05cxl: Convert find_cxl_root() to return a 'struct cxl_root *'Dave Jiang1-7/+7
2024-01-05cxl: Introduce put_cxl_root() helperDave Jiang1-0/+3
2024-01-04cxl/port: Fix missing target list lockDan Williams1-2/+0
2023-12-22cxl: Add helper function that calculate performance data for downstream portsDave Jiang1-0/+3
2023-12-22cxl: Store the access coordinates for the generic portsDave Jiang1-0/+2
2023-12-22cxl: Calculate and store PCI link latency for the downstream portsDave Jiang1-0/+4
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