aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/dpll/zl3073x/dpll.c
AgeCommit message (Expand)AuthorFilesLines
2025-10-28dpll: zl3073x: Fix output pin registrationIvan Vecera1-1/+1
2025-09-29dpll: zl3073x: Allow to configure phase offset averaging factorIvan Vecera1-0/+58
2025-07-17dpll: zl3073x: Add support to get fractional frequency offsetIvan Vecera1-2/+67
2025-07-17dpll: zl3073x: Add support to adjust phaseIvan Vecera1-0/+191
2025-07-17dpll: zl3073x: Implement phase offset monitor featureIvan Vecera1-9/+116
2025-07-17dpll: zl3073x: Add support to get phase offset on connected input pinIvan Vecera1-1/+104
2025-07-17dpll: zl3073x: Add support to get/set esync on pinsIvan Vecera1-1/+349
2025-07-09dpll: zl3073x: Add support to get/set frequency on pinsIvan Vecera1-0/+349
2025-07-09dpll: zl3073x: Implement input pin state setting in automatic modeIvan Vecera1-0/+32
2025-07-09dpll: zl3073x: Add support to get/set priority on input pinsIvan Vecera1-0/+88
2025-07-09dpll: zl3073x: Implement input pin selection in manual modeIvan Vecera1-0/+118
2025-07-09dpll: zl3073x: Register DPLL devices and pinsIvan Vecera1-0/+917
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.