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path: root/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (follow)
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2015-10-15drm/amdgpu: Keep the pflip interrupts always enabled v7Michel Dänzer1-2/+28
This fixes flickering issues caused by prematurely firing pflip interrupts. v2 (chk): add commit message, fix DCE V10/V11 and DM as well v3: Re-enable pflip interrupt wherever we re-enable a CRTC v4: Enable pflip interrupt in DAL as well v5: drop DAL changes for upstream v6: (agd): only enable interrupts on crtcs that exist v7: (agd): integrate suggestions from Michel Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-10-14drm/amdgpu: clean up pageflip interrupt handlingAlex Deucher1-53/+17
Check to make sure we aren't touching a non-existent display controller and simplify the code. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Fold set_cursor() into show_cursor()Alex Deucher1-13/+5
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Clean up reference counting and pinning of the cursor BOsAlex Deucher1-37/+24
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce8 set_cursor. This fixes dce8 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Move hotspot handling out of set_cursorAlex Deucher1-19/+17
It's only needed in dce8 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Re-show the cursor after a modeset (v2)Alex Deucher1-24/+57
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error message Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher1-23/+51
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)Jammy Zhou1-2/+2
Make the definitions common for all driver components v2: fix kfd Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu/dce8: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer1-0/+4
Something (ATOM BIOS?) seems to be clobbering the LB_INTERRUPT_MASK register while the CRTC is off, which caused e.g. glxgears or gnome-shell to hang after a modeset. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-07-08drm/amdgpu: Handle irqs only based on irq ring, not irq status regs.Mario Kleiner1-8/+14
This is a translation of the patch ... "drm/radeon: Handle irqs only based on irq ring, not irq status regs." ... for the vblank irq handling, to fix the same problem described in that patch on the new driver. Only compile tested due to lack of suitable hw. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> CC: Michel Dänzer <michel.daenzer@amd.com> CC: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-29drm/amdgpu: fix hpd range check in dce_v8_0_hpd_irq()Alex Deucher1-1/+1
Spotted by Dan Carpenter. This is a slight variant of his fix. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: don't enable/disable display twice on suspend/resumeAlex Deucher1-18/+0
We were doing it in the common code and in the IP specific code. Remove the IP specific code. The common code handles the ordering properly. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: implement the allocation range (v3)Chunming Zhou1-1/+1
Pass a ttm_placement pointer to amdgpu_bo_create_restricted add min_offset to amdgpu_bo_pin_restricted. This makes it easier to allocate memory with address restrictions. With this patch we can also enable 2-ended allocation again. v2: fix rebase conflicts v3: memset placements before using Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)yanyang11-20/+30
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: rework tiling flagsMarek Olšák1-80/+11
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2015-06-03drm/amdgpu: Add support for CIK partsAlex Deucher1-0/+3830
This patch adds support for CIK parts. These parts are also supported by radeon which is the preferred option, so there is a config option to enable support for CIK parts in amdgpu for testing. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>