aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2025-02-25drm/amdgpu: update the handle ptr in is_idleSunil Khatri1-2/+2
2025-02-19drm/amdgpu: update the handle ptr in get_clockgating_stateSunil Khatri1-2/+2
2024-12-10drm/amdgpu: pass ip_block in set_clockgating_stateBoyuan Zhang1-9/+4
2024-12-10drm/amdgpu: pass ip_block in set_powergating_stateBoyuan Zhang1-2/+2
2024-10-22drm/amdgpu: Clean the functions pointer set as NULLSunil Khatri1-3/+0
2024-10-07drm/amdgpu: change the comment from handle to ip_blockSunil Khatri1-2/+2
2024-10-07drm/amdgpu: update the handle ptr in hw_finiSunil Khatri1-3/+3
2024-10-07drm/amdgpu: update the handle ptr in hw_initSunil Khatri1-5/+4
2024-10-07drm/amdgpu: update the handle ptr in resumeSunil Khatri1-2/+2
2024-10-07drm/amdgpu: update the handle ptr in suspendSunil Khatri1-2/+2
2024-10-07drm/amdgpu: update the handle ptr in wait_for_idleSunil Khatri1-3/+8
2024-10-01drm/amdgpu: update the handle ptr in soft_resetSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in prepare_suspendSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in sw_finiSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in sw_initSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in early_initSunil Khatri1-2/+2
2024-04-26drm/amdgpu: add protype for print ip stateSunil Khatri1-0/+1
2024-04-26drm/amdgpu: add prototype for ip dumpSunil Khatri1-0/+1
2023-11-10drm/amdgpu: move UVD and VCE sched entity init after sched initAlex Deucher1-2/+0
2023-10-13drm/amd: Split up UVD suspend into prepare and suspend stepsMario Limonciello1-0/+8
2022-04-08drm/amdgpu: expand cg_flags from u32 to u64Evan Quan1-1/+1
2021-09-23drm/amdgpu: Fix crash on device remove/driver unloadAndrey Grodzovsky1-11/+13
2021-08-25drm/amdgpu: add missing cleanups for more ASICs on UVD/VCE suspendEvan Quan1-1/+24
2021-04-09drm/amdgpu: add the sched_score to amdgpu_ring_initChristian König1-1/+1
2020-12-01drm/amd/amdgpu/uvd_v5_0: Fix a bunch of kernel-doc function documentation issuesLee Jones1-3/+7
2020-09-22drm/amd: fix typoes in commentsBernard Zhao1-2/+2
2020-04-09drm/amdgpu: rework sched_list generationNirmoy Das1-1/+2
2020-04-01drm/amdgpu: stop disable the scheduler during HW finiChristian König1-3/+0
2020-01-22drm/amdgpu: remove unnecessary conversion to boolNirmoy Das1-1/+1
2019-06-14Merge tag 'drm-misc-next-2019-06-14' of git://anongit.freedesktop.org/drm/drm-misc into drm-nextDaniel Vetter1-2/+3
2019-06-10drm/amd: drop use of drmP.h in remaining filesSam Ravnborg1-1/+0
2019-06-10drm/amd: drop dependencies on drm_os_linux.hSam Ravnborg1-1/+3
2019-05-24drm/amdgpu/UVD: set no_user_fence flag to trueLeo Liu1-0/+1
2019-01-25drm/amdgpu: add flags to emit_ib interface v2Jack Xiao1-1/+1
2018-11-28drm/amdgpu: Reorder uvd ring init before uvd resumeChris Wilson1-4/+4
2018-11-05drm/amdgpu: Modify the argument of emit_ib interfaceRex Zhu1-1/+2
2018-11-05drm/amdgpu: further ring test cleanupsChristian König1-12/+4
2018-11-05drm/amdgpu: Retire amdgpu_ring.ready flag v4Andrey Grodzovsky1-6/+3
2018-09-26drm/amdgpu: move more defines into amdgpu_irq.hChristian König1-1/+1
2018-08-13drm/amdgpu/uvd: UVD entity initialization relys on ring initializationEmily Deng1-0/+4
2018-07-13drm/amd: Use newly added interrupt source defs for VI v3.Andrey Grodzovsky1-1/+2
2018-05-18drm/amdgpu: fix insert nop for UVD5 ringLeo Liu1-2/+13
2018-05-18drm/amdgpu/vg20:Restruct uvd to support multiple uvdsJames Zhu1-12/+13
2018-02-19drm/amdgpu: remove now superflous *_hdp operationChristian König1-30/+0
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-1/+1
2017-12-06drm/amd/amdgpu: fix UVD mc offsetsPiotr Redlewski1-1/+1
2017-12-04drm/amdgpu: change redundant init logs to debug levelpding1-1/+1
2017-04-04drm/amdgpu: various cleanups for uvd/vce.Rex Zhu1-15/+3
2017-03-29drm/amdgpu: switch ih handling to two levels (v3)Alex Deucher1-1/+1
2017-03-29drm/amdgpu: change wptr to 64 bits (v2)Ken Wang1-4/+5
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.